PIP405.h 15 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * board/config.h - configuration options, board specific
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /***********************************************************
  29. * High Level Configuration Options
  30. * (easy to change)
  31. ***********************************************************/
  32. #define CONFIG_405GP 1 /* This is a PPC405 CPU */
  33. #define CONFIG_4xx 1 /* ...member of PPC4xx family */
  34. #define CONFIG_PIP405 1 /* ...on a PIP405 board */
  35. #define CONFIG_SYS_TEXT_BASE 0xFFF80000
  36. /***********************************************************
  37. * Clock
  38. ***********************************************************/
  39. #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
  40. /*
  41. * BOOTP options
  42. */
  43. #define CONFIG_BOOTP_BOOTFILESIZE
  44. #define CONFIG_BOOTP_BOOTPATH
  45. #define CONFIG_BOOTP_GATEWAY
  46. #define CONFIG_BOOTP_HOSTNAME
  47. /*
  48. * Command line configuration.
  49. */
  50. #include <config_cmd_default.h>
  51. #define CONFIG_CMD_IDE
  52. #define CONFIG_CMD_DHCP
  53. #define CONFIG_CMD_PCI
  54. #define CONFIG_CMD_CACHE
  55. #define CONFIG_CMD_IRQ
  56. #define CONFIG_CMD_EEPROM
  57. #define CONFIG_CMD_I2C
  58. #define CONFIG_CMD_REGINFO
  59. #define CONFIG_CMD_FDC
  60. #define CONFIG_CMD_SCSI
  61. #define CONFIG_CMD_FAT
  62. #define CONFIG_CMD_DATE
  63. #define CONFIG_CMD_ELF
  64. #define CONFIG_CMD_USB
  65. #define CONFIG_CMD_MII
  66. #define CONFIG_CMD_SDRAM
  67. #define CONFIG_CMD_PING
  68. #define CONFIG_CMD_SAVES
  69. #define CONFIG_CMD_BSP
  70. #define CONFIG_SYS_HUSH_PARSER
  71. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  72. /**************************************************************
  73. * I2C Stuff:
  74. * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
  75. * 0x53.
  76. * Caution: on the same bus is the SPD (Serial Presens Detect
  77. * EEPROM of the SDRAM
  78. * The Atmel EEPROM uses 16Bit addressing.
  79. ***************************************************************/
  80. #define CONFIG_HARD_I2C /* I2c with hardware support */
  81. #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  82. #define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
  83. #define CONFIG_SYS_I2C_SLAVE 0x7F
  84. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
  85. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  86. #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
  87. #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
  88. #define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */
  89. #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  90. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */
  91. /* 64 byte page write mode using*/
  92. /* last 6 bits of the address */
  93. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
  94. /***************************************************************
  95. * Definitions for Serial Presence Detect EEPROM address
  96. * (to get SDRAM settings)
  97. ***************************************************************/
  98. #define SPD_EEPROM_ADDRESS 0x50
  99. #define CONFIG_BOARD_EARLY_INIT_F
  100. #define CONFIG_BOARD_EARLY_INIT_R
  101. /**************************************************************
  102. * Environment definitions
  103. **************************************************************/
  104. #define CONFIG_BAUDRATE 9600 /* STD Baudrate */
  105. #define CONFIG_BOOTDELAY 5
  106. /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
  107. /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
  108. #define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
  109. #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
  110. #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
  111. #define CONFIG_IPADDR 10.0.0.100
  112. #define CONFIG_SERVERIP 10.0.0.1
  113. #define CONFIG_PREBOOT
  114. /***************************************************************
  115. * defines if the console is stored in the environment
  116. ***************************************************************/
  117. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* stdin, stdout and stderr are in evironment */
  118. /***************************************************************
  119. * defines if an overwrite_console function exists
  120. *************************************************************/
  121. #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
  122. #define CONFIG_SYS_CONSOLE_INFO_QUIET
  123. /***************************************************************
  124. * defines if the overwrite_console should be stored in the
  125. * environment
  126. **************************************************************/
  127. #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
  128. /**************************************************************
  129. * loads config
  130. *************************************************************/
  131. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  132. #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  133. #define CONFIG_MISC_INIT_R
  134. /***********************************************************
  135. * Miscellaneous configurable options
  136. **********************************************************/
  137. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  138. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  139. #if defined(CONFIG_CMD_KGDB)
  140. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  141. #else
  142. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  143. #endif
  144. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  145. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  146. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  147. #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
  148. #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
  149. #define CONFIG_CONS_INDEX 1 /* Use UART0 */
  150. #define CONFIG_SYS_NS16550
  151. #define CONFIG_SYS_NS16550_SERIAL
  152. #define CONFIG_SYS_NS16550_REG_SIZE 1
  153. #define CONFIG_SYS_NS16550_CLK get_serial_clock()
  154. #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
  155. #define CONFIG_SYS_BASE_BAUD 691200
  156. /* The following table includes the supported baudrates */
  157. #define CONFIG_SYS_BAUDRATE_TABLE \
  158. { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
  159. 57600, 115200, 230400, 460800, 921600 }
  160. #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
  161. #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  162. #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
  163. /*-----------------------------------------------------------------------
  164. * PCI stuff
  165. *-----------------------------------------------------------------------
  166. */
  167. #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
  168. #define PCI_HOST_FORCE 1 /* configure as pci host */
  169. #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
  170. #define CONFIG_PCI /* include pci support */
  171. #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */
  172. #define CONFIG_PCI_PNP /* pci plug-and-play */
  173. /* resource configuration */
  174. #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
  175. #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
  176. #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
  177. #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
  178. #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
  179. #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
  180. #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
  181. #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */
  182. /*-----------------------------------------------------------------------
  183. * Start addresses for the final memory configuration
  184. * (Set up by the startup code)
  185. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  186. */
  187. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  188. #define CONFIG_SYS_FLASH_BASE 0xFFF80000
  189. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  190. #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
  191. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */
  192. /*
  193. * For booting Linux, the board info and command line data
  194. * have to be in the first 8 MB of memory, since this is
  195. * the maximum mapped by the Linux kernel during initialization.
  196. */
  197. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  198. /*-----------------------------------------------------------------------
  199. * FLASH organization
  200. */
  201. #define CONFIG_SYS_UPDATE_FLASH_SIZE
  202. #define CONFIG_SYS_FLASH_PROTECTION
  203. #define CONFIG_SYS_FLASH_EMPTY_INFO
  204. #define CONFIG_SYS_FLASH_CFI
  205. #define CONFIG_FLASH_CFI_DRIVER
  206. #define CONFIG_FLASH_SHOW_PROGRESS 45
  207. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  208. #define CONFIG_SYS_MAX_FLASH_SECT 256
  209. /*
  210. * Init Memory Controller:
  211. */
  212. #define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */
  213. #define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */
  214. /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
  215. #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
  216. #define CONFIG_BOARD_EARLY_INIT_F
  217. /* Configuration Port location */
  218. #define CONFIG_PORT_ADDR 0xF4000000
  219. #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
  220. /*-----------------------------------------------------------------------
  221. * Definitions for initial stack pointer and data area (in On Chip SRAM)
  222. */
  223. #define CONFIG_SYS_TEMP_STACK_OCM 1
  224. #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
  225. #define CONFIG_SYS_OCM_DATA_SIZE 0x1000
  226. #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
  227. #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
  228. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  229. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  230. /***********************************************************************
  231. * External peripheral base address
  232. ***********************************************************************/
  233. #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
  234. /***********************************************************************
  235. * Last Stage Init
  236. ***********************************************************************/
  237. #define CONFIG_LAST_STAGE_INIT
  238. /************************************************************
  239. * Ethernet Stuff
  240. ***********************************************************/
  241. #define CONFIG_PPC4xx_EMAC
  242. #define CONFIG_MII 1 /* MII PHY management */
  243. #define CONFIG_PHY_ADDR 1 /* PHY address */
  244. /************************************************************
  245. * RTC
  246. ***********************************************************/
  247. #define CONFIG_RTC_MC146818
  248. #undef CONFIG_WATCHDOG /* watchdog disabled */
  249. /************************************************************
  250. * IDE/ATA stuff
  251. ************************************************************/
  252. #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */
  253. #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
  254. #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
  255. #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
  256. #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */
  257. #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
  258. #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
  259. #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
  260. #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
  261. #undef CONFIG_IDE_LED /* no led for ide supported */
  262. #define CONFIG_IDE_RESET /* reset for ide supported... */
  263. #define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */
  264. #define CONFIG_SUPPORT_VFAT
  265. /************************************************************
  266. * ATAPI support (experimental)
  267. ************************************************************/
  268. #define CONFIG_ATAPI /* enable ATAPI Support */
  269. /************************************************************
  270. * SCSI support (experimental) only SYM53C8xx supported
  271. ************************************************************/
  272. #define CONFIG_SCSI_SYM53C8XX
  273. #define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */
  274. #define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */
  275. #define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
  276. #define CONFIG_SYS_SCSI_SPIN_UP_TIME 2
  277. /************************************************************
  278. * Disk-On-Chip configuration
  279. ************************************************************/
  280. #define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
  281. #define CONFIG_SYS_DOC_SHORT_TIMEOUT
  282. #define CONFIG_SYS_DOC_SUPPORT_2000
  283. #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
  284. /************************************************************
  285. * DISK Partition support
  286. ************************************************************/
  287. #define CONFIG_DOS_PARTITION
  288. #define CONFIG_MAC_PARTITION
  289. #define CONFIG_ISO_PARTITION /* Experimental */
  290. /************************************************************
  291. * Keyboard support
  292. ************************************************************/
  293. #define CONFIG_ISA_KEYBOARD
  294. /************************************************************
  295. * Video support
  296. ************************************************************/
  297. #define CONFIG_VIDEO /*To enable video controller support */
  298. #define CONFIG_VIDEO_CT69000
  299. #define CONFIG_CFB_CONSOLE
  300. #define CONFIG_VIDEO_LOGO
  301. #define CONFIG_CONSOLE_EXTRA_INFO
  302. #define CONFIG_VGA_AS_SINGLE_DEVICE
  303. #define CONFIG_VIDEO_SW_CURSOR
  304. #define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */
  305. /************************************************************
  306. * USB support
  307. ************************************************************/
  308. #define CONFIG_USB_UHCI
  309. #define CONFIG_USB_KEYBOARD
  310. #define CONFIG_USB_STORAGE
  311. /* Enable needed helper functions */
  312. #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
  313. /************************************************************
  314. * Debug support
  315. ************************************************************/
  316. #if defined(CONFIG_CMD_KGDB)
  317. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  318. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  319. #endif
  320. /************************************************************
  321. * support BZIP2 compression
  322. ************************************************************/
  323. #define CONFIG_BZIP2 1
  324. /************************************************************
  325. * Ident
  326. ************************************************************/
  327. #define VERSION_TAG "released"
  328. #define CONFIG_ISO_STRING "MEV-10066-001"
  329. #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
  330. #endif /* __CONFIG_H */