tlb.c 4.7 KB

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  1. /*
  2. * Copyright 2008-2009 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/processor.h>
  27. #include <asm/mmu.h>
  28. #ifdef CONFIG_ADDR_MAP
  29. #include <addr_map.h>
  30. #endif
  31. DECLARE_GLOBAL_DATA_PTR;
  32. void set_tlb(u8 tlb, u32 epn, u64 rpn,
  33. u8 perms, u8 wimge,
  34. u8 ts, u8 esel, u8 tsize, u8 iprot)
  35. {
  36. u32 _mas0, _mas1, _mas2, _mas3, _mas7;
  37. _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
  38. _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
  39. _mas2 = FSL_BOOKE_MAS2(epn, wimge);
  40. _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
  41. _mas7 = FSL_BOOKE_MAS7(rpn);
  42. write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
  43. #ifdef CONFIG_ADDR_MAP
  44. if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
  45. addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
  46. #endif
  47. }
  48. void disable_tlb(u8 esel)
  49. {
  50. u32 _mas0, _mas1, _mas2, _mas3, _mas7;
  51. _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
  52. _mas1 = 0;
  53. _mas2 = 0;
  54. _mas3 = 0;
  55. _mas7 = 0;
  56. mtspr(MAS0, _mas0);
  57. mtspr(MAS1, _mas1);
  58. mtspr(MAS2, _mas2);
  59. mtspr(MAS3, _mas3);
  60. #ifdef CONFIG_ENABLE_36BIT_PHYS
  61. mtspr(MAS7, _mas7);
  62. #endif
  63. asm volatile("isync;msync;tlbwe;isync");
  64. #ifdef CONFIG_ADDR_MAP
  65. if (gd->flags & GD_FLG_RELOC)
  66. addrmap_set_entry(0, 0, 0, esel);
  67. #endif
  68. }
  69. void invalidate_tlb(u8 tlb)
  70. {
  71. if (tlb == 0)
  72. mtspr(MMUCSR0, 0x4);
  73. if (tlb == 1)
  74. mtspr(MMUCSR0, 0x2);
  75. }
  76. void init_tlbs(void)
  77. {
  78. int i;
  79. for (i = 0; i < num_tlb_entries; i++) {
  80. write_tlb(tlb_table[i].mas0,
  81. tlb_table[i].mas1,
  82. tlb_table[i].mas2,
  83. tlb_table[i].mas3,
  84. tlb_table[i].mas7);
  85. }
  86. return ;
  87. }
  88. static void tlbsx (const volatile unsigned *addr)
  89. {
  90. __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
  91. }
  92. /* return -1 if we didn't find anything */
  93. int find_tlb_idx(void *addr, u8 tlbsel)
  94. {
  95. u32 _mas0, _mas1;
  96. /* zero out Search PID, AS */
  97. mtspr(MAS6, 0);
  98. tlbsx(addr);
  99. _mas0 = mfspr(MAS0);
  100. _mas1 = mfspr(MAS1);
  101. /* we found something, and its in the TLB we expect */
  102. if ((MAS1_VALID & _mas1) &&
  103. (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
  104. return ((_mas0 & MAS0_ESEL_MSK) >> 16);
  105. }
  106. return -1;
  107. }
  108. #ifdef CONFIG_ADDR_MAP
  109. void init_addr_map(void)
  110. {
  111. int i;
  112. unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
  113. /* walk all the entries */
  114. for (i = 0; i < max_cam; i++) {
  115. unsigned long epn;
  116. u32 tsize, _mas1;
  117. phys_addr_t rpn;
  118. mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
  119. asm volatile("tlbre;isync");
  120. _mas1 = mfspr(MAS1);
  121. /* if the entry isn't valid skip it */
  122. if (!(_mas1 & MAS1_VALID))
  123. continue;
  124. tsize = (_mas1 >> 8) & 0xf;
  125. epn = mfspr(MAS2) & MAS2_EPN;
  126. rpn = mfspr(MAS3) & MAS3_RPN;
  127. #ifdef CONFIG_ENABLE_36BIT_PHYS
  128. rpn |= ((phys_addr_t)mfspr(MAS7)) << 32;
  129. #endif
  130. addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i);
  131. }
  132. return ;
  133. }
  134. #endif
  135. #ifndef CONFIG_SYS_DDR_TLB_START
  136. #define CONFIG_SYS_DDR_TLB_START 8
  137. #endif
  138. unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
  139. {
  140. unsigned int tlb_size;
  141. unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
  142. unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
  143. unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
  144. u64 size, memsize = (u64)memsize_in_meg << 20;
  145. size = min(memsize, CONFIG_MAX_MEM_MAPPED);
  146. /* Convert (4^max) kB to (2^max) bytes */
  147. max_cam = max_cam * 2 + 10;
  148. for (; size && ram_tlb_index < 16; ram_tlb_index++) {
  149. u32 camsize = __ilog2_u64(size) & ~1U;
  150. u32 align = __ilog2(ram_tlb_address) & ~1U;
  151. if (align == -2) align = max_cam;
  152. if (camsize > align)
  153. camsize = align;
  154. if (camsize > max_cam)
  155. camsize = max_cam;
  156. tlb_size = (camsize - 10) / 2;
  157. set_tlb(1, ram_tlb_address, ram_tlb_address,
  158. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  159. 0, ram_tlb_index, tlb_size, 1);
  160. size -= 1ULL << camsize;
  161. memsize -= 1ULL << camsize;
  162. ram_tlb_address += 1UL << camsize;
  163. }
  164. if (memsize)
  165. print_size(memsize, " left unmapped\n");
  166. /*
  167. * Confirm that the requested amount of memory was mapped.
  168. */
  169. return memsize_in_meg;
  170. }