flash.c 12 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2001-2004
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * (C) Copyright 2003
  9. * Texas Instruments, <www.ti.com>
  10. * Kshitij Gupta <Kshitij@ti.com>
  11. * (C) Copyright 2004
  12. * Texas Instruments <www.ti.com>
  13. * Rishi Bhattacharya
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. #include <linux/byteorder/swab.h>
  35. #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
  36. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  37. /* Board support for 1 or 2 flash devices */
  38. #undef FLASH_PORT_WIDTH32
  39. #define FLASH_PORT_WIDTH16
  40. #ifdef FLASH_PORT_WIDTH16
  41. #define FLASH_PORT_WIDTH ushort
  42. #define FLASH_PORT_WIDTHV vu_short
  43. #define SWAP(x) __swab16(x)
  44. #else
  45. #define FLASH_PORT_WIDTH ulong
  46. #define FLASH_PORT_WIDTHV vu_long
  47. #define SWAP(x) __swab32(x)
  48. #endif
  49. #define FPW FLASH_PORT_WIDTH
  50. #define FPWV FLASH_PORT_WIDTHV
  51. #define mb() __asm__ __volatile__ ("" : : : "memory")
  52. /* Flash Organization Structure */
  53. typedef struct OrgDef {
  54. unsigned int sector_number;
  55. unsigned int sector_size;
  56. } OrgDef;
  57. /* Flash Organizations */
  58. OrgDef OrgIntel_28F256L18T[] = {
  59. {4, 32 * 1024}, /* 4 * 32kBytes sectors */
  60. {255, 128 * 1024}, /* 255 * 128kBytes sectors */
  61. };
  62. /*-----------------------------------------------------------------------
  63. * Functions
  64. */
  65. unsigned long flash_init (void);
  66. static ulong flash_get_size (FPW * addr, flash_info_t * info);
  67. static int write_data (flash_info_t * info, ulong dest, FPW data);
  68. static void flash_get_offsets (ulong base, flash_info_t * info);
  69. void inline spin_wheel (void);
  70. void flash_print_info (flash_info_t * info);
  71. void flash_unprotect_sectors (FPWV * addr);
  72. int flash_erase (flash_info_t * info, int s_first, int s_last);
  73. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
  74. /*-----------------------------------------------------------------------
  75. */
  76. unsigned long flash_init (void)
  77. {
  78. int i;
  79. ulong size = 0;
  80. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  81. switch (i) {
  82. case 0:
  83. flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
  84. flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
  85. break;
  86. default:
  87. panic ("configured too many flash banks!\n");
  88. break;
  89. }
  90. size += flash_info[i].size;
  91. }
  92. /* Protect monitor and environment sectors
  93. */
  94. flash_protect (FLAG_PROTECT_SET,
  95. CFG_FLASH_BASE,
  96. CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
  97. flash_protect (FLAG_PROTECT_SET,
  98. CFG_ENV_ADDR,
  99. CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
  100. return size;
  101. }
  102. /*-----------------------------------------------------------------------
  103. */
  104. static void flash_get_offsets (ulong base, flash_info_t * info)
  105. {
  106. int i;
  107. OrgDef *pOrgDef;
  108. pOrgDef = OrgIntel_28F256L18T;
  109. if (info->flash_id == FLASH_UNKNOWN) {
  110. return;
  111. }
  112. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  113. for (i = 0; i < info->sector_count; i++) {
  114. if (i > 255) {
  115. info->start[i] = base + (i * 0x8000);
  116. info->protect[i] = 0;
  117. } else {
  118. info->start[i] = base +
  119. (i * PHYS_FLASH_SECT_SIZE);
  120. info->protect[i] = 0;
  121. }
  122. }
  123. }
  124. }
  125. /*-----------------------------------------------------------------------
  126. */
  127. void flash_print_info (flash_info_t * info)
  128. {
  129. int i;
  130. if (info->flash_id == FLASH_UNKNOWN) {
  131. printf ("missing or unknown FLASH type\n");
  132. return;
  133. }
  134. switch (info->flash_id & FLASH_VENDMASK) {
  135. case FLASH_MAN_INTEL:
  136. printf ("INTEL ");
  137. break;
  138. default:
  139. printf ("Unknown Vendor ");
  140. break;
  141. }
  142. switch (info->flash_id & FLASH_TYPEMASK) {
  143. case FLASH_28F256L18T:
  144. printf ("FLASH 28F256L18T\n");
  145. break;
  146. case FLASH_28F128J3A:
  147. printf ("FLASH 28F128J3A\n");
  148. break;
  149. default:
  150. printf ("Unknown Chip Type\n");
  151. break;
  152. }
  153. printf (" Size: %ld MB in %d Sectors\n",
  154. info->size >> 20, info->sector_count);
  155. printf (" Sector Start Addresses:");
  156. for (i = 0; i < info->sector_count; ++i) {
  157. if ((i % 5) == 0)
  158. printf ("\n ");
  159. printf (" %08lX%s",
  160. info->start[i], info->protect[i] ? " (RO)" : " ");
  161. }
  162. printf ("\n");
  163. return;
  164. }
  165. /*
  166. * The following code cannot be run from FLASH!
  167. */
  168. static ulong flash_get_size (FPW * addr, flash_info_t * info)
  169. {
  170. volatile FPW value;
  171. /* Write auto select command: read Manufacturer ID */
  172. addr[0x5555] = (FPW) 0x00AA00AA;
  173. addr[0x2AAA] = (FPW) 0x00550055;
  174. addr[0x5555] = (FPW) 0x00900090;
  175. mb ();
  176. value = addr[0];
  177. switch (value) {
  178. case (FPW) INTEL_MANUFACT:
  179. info->flash_id = FLASH_MAN_INTEL;
  180. break;
  181. case (FPW) MT2_MANUFACT:
  182. info->flash_id = FLASH_MAN_INTEL;
  183. break;
  184. default:
  185. info->flash_id = FLASH_UNKNOWN;
  186. info->sector_count = 0;
  187. info->size = 0;
  188. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  189. return (0); /* no or unknown flash */
  190. }
  191. mb ();
  192. value = addr[1]; /* device ID */
  193. switch (value) {
  194. case (FPW) (INTEL_ID_28F256L18T):
  195. info->flash_id += FLASH_28F256L18T;
  196. info->sector_count = 259;
  197. info->size = 0x02000000;
  198. break; /* => 32 MB */
  199. case (FPW) (INTEL_ID_28F256K3):
  200. info->flash_id +=FLASH_28F256K3;
  201. info->sector_count = 259;
  202. info->size = 0x02000000;
  203. printf ("\Intel StrataFlash 28F256K3C device initialized\n");
  204. break; /* => 32 MB */
  205. case (FPW) (INTEL_ID_28F128J3A):
  206. info->flash_id +=FLASH_28F128J3A;
  207. info->sector_count = 259;
  208. info->size = 0x02000000;
  209. printf ("\Micron StrataFlash MT28F128J3 device initialized\n");
  210. break; /* => 32 MB */
  211. default:
  212. info->flash_id = FLASH_UNKNOWN;
  213. break;
  214. }
  215. if (info->sector_count > CFG_MAX_FLASH_SECT) {
  216. printf ("** ERROR: sector count %d > max (%d) **\n",
  217. info->sector_count, CFG_MAX_FLASH_SECT);
  218. info->sector_count = CFG_MAX_FLASH_SECT;
  219. }
  220. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  221. return (info->size);
  222. }
  223. /* unprotects a sector for write and erase
  224. * on some intel parts, this unprotects the entire chip, but it
  225. * wont hurt to call this additional times per sector...
  226. */
  227. void flash_unprotect_sectors (FPWV * addr)
  228. {
  229. #define PD_FINTEL_WSMS_READY_MASK 0x0080
  230. FPW status;
  231. *addr = (FPW) 0x00500050; /* clear status register */
  232. /* this sends the clear lock bit command */
  233. *addr = (FPW) 0x00600060;
  234. *addr = (FPW) 0x00D000D0;
  235. while (((status =*addr) & (FPW) 0x00800080) != (FPW) 0x00800080);
  236. *addr = (FPW) 0x00FF00FF;
  237. }
  238. /*-----------------------------------------------------------------------
  239. */
  240. int flash_erase (flash_info_t * info, int s_first, int s_last)
  241. {
  242. int flag, prot, sect;
  243. ulong type, start, last;
  244. int rcode = 0;
  245. if ((s_first < 0) || (s_first > s_last)) {
  246. if (info->flash_id == FLASH_UNKNOWN) {
  247. printf ("- missing\n");
  248. } else {
  249. printf ("- no sectors to erase\n");
  250. }
  251. return 1;
  252. }
  253. type = (info->flash_id & FLASH_VENDMASK);
  254. if ((type != FLASH_MAN_INTEL)) {
  255. printf ("Can't erase unknown flash type %08lx - aborted\n",
  256. info->flash_id);
  257. return 1;
  258. }
  259. prot = 0;
  260. for (sect = s_first; sect <= s_last; ++sect) {
  261. if (info->protect[sect]) {
  262. prot++;
  263. }
  264. }
  265. if (prot) {
  266. printf ("- Warning: %d protected sectors will not be erased!\n",
  267. prot);
  268. } else {
  269. printf ("\n");
  270. }
  271. start = get_timer (0);
  272. last = start;
  273. /* Disable interrupts which might cause a timeout here */
  274. flag = disable_interrupts ();
  275. /* Start erase on unprotected sectors */
  276. for (sect = s_first; sect <= s_last; sect++) {
  277. if (info->protect[sect] == 0) { /* not protected */
  278. FPWV *addr = (FPWV *) (info->start[sect]);
  279. FPW status;
  280. printf ("Erasing sector %2d ... ", sect);
  281. flash_unprotect_sectors (addr);
  282. /* arm simple, non interrupt dependent timer */
  283. reset_timer_masked ();
  284. *addr = (FPW) 0x00500050;/* clear status register */
  285. *addr = (FPW) 0x00200020;/* erase setup */
  286. *addr = (FPW) 0x00D000D0;/* erase confirm */
  287. while (((status =
  288. *addr) & (FPW) 0x00800080) !=
  289. (FPW) 0x00800080) {
  290. if (get_timer_masked () >
  291. CFG_FLASH_ERASE_TOUT) {
  292. printf ("Timeout\n");
  293. /* suspend erase */
  294. *addr = (FPW) 0x00B000B0;
  295. /* reset to read mode */
  296. *addr = (FPW) 0x00FF00FF;
  297. rcode = 1;
  298. break;
  299. }
  300. }
  301. /* clear status register cmd. */
  302. *addr = (FPW) 0x00500050;
  303. *addr = (FPW) 0x00FF00FF;/* resest to read mode */
  304. printf (" done\n");
  305. }
  306. }
  307. return rcode;
  308. }
  309. /*-----------------------------------------------------------------------
  310. * Copy memory to flash, returns:
  311. * 0 - OK
  312. * 1 - write timeout
  313. * 2 - Flash not erased
  314. * 4 - Flash not identified
  315. */
  316. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  317. {
  318. ulong cp, wp;
  319. FPW data;
  320. int count, i, l, rc, port_width;
  321. if (info->flash_id == FLASH_UNKNOWN) {
  322. return 4;
  323. }
  324. /* get lower word aligned address */
  325. #ifdef FLASH_PORT_WIDTH16
  326. wp = (addr & ~1);
  327. port_width = 2;
  328. #else
  329. wp = (addr & ~3);
  330. port_width = 4;
  331. #endif
  332. /*
  333. * handle unaligned start bytes
  334. */
  335. if ((l = addr - wp) != 0) {
  336. data = 0;
  337. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  338. data = (data << 8) | (*(uchar *) cp);
  339. }
  340. for (; i < port_width && cnt > 0; ++i) {
  341. data = (data << 8) | *src++;
  342. --cnt;
  343. ++cp;
  344. }
  345. for (; cnt == 0 && i < port_width; ++i, ++cp) {
  346. data = (data << 8) | (*(uchar *) cp);
  347. }
  348. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  349. return (rc);
  350. }
  351. wp += port_width;
  352. }
  353. /*
  354. * handle word aligned part
  355. */
  356. count = 0;
  357. while (cnt >= port_width) {
  358. data = 0;
  359. for (i = 0; i < port_width; ++i) {
  360. data = (data << 8) | *src++;
  361. }
  362. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  363. return (rc);
  364. }
  365. wp += port_width;
  366. cnt -= port_width;
  367. if (count++ > 0x800) {
  368. spin_wheel ();
  369. count = 0;
  370. }
  371. }
  372. if (cnt == 0) {
  373. return (0);
  374. }
  375. /*
  376. * handle unaligned tail bytes
  377. */
  378. data = 0;
  379. for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
  380. data = (data << 8) | *src++;
  381. --cnt;
  382. }
  383. for (; i < port_width; ++i, ++cp) {
  384. data = (data << 8) | (*(uchar *) cp);
  385. }
  386. return (write_data (info, wp, SWAP (data)));
  387. }
  388. /*-----------------------------------------------------------------------
  389. * Write a word or halfword to Flash, returns:
  390. * 0 - OK
  391. * 1 - write timeout
  392. * 2 - Flash not erased
  393. */
  394. static int write_data (flash_info_t * info, ulong dest, FPW data)
  395. {
  396. FPWV *addr = (FPWV *) dest;
  397. ulong status;
  398. int flag;
  399. /* Check if Flash is (sufficiently) erased */
  400. if ((*addr & data) != data) {
  401. printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
  402. return (2);
  403. }
  404. /* Disable interrupts which might cause a timeout here */
  405. flag = disable_interrupts ();
  406. *addr = (FPW) 0x00400040; /* write setup */
  407. *addr = data;
  408. /* arm simple, non interrupt dependent timer */
  409. reset_timer_masked ();
  410. /* wait while polling the status register */
  411. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  412. if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
  413. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  414. return (1);
  415. }
  416. }
  417. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  418. return (0);
  419. }
  420. void inline spin_wheel (void)
  421. {
  422. static int p = 0;
  423. static char w[] = "\\/-";
  424. printf ("\010%c", w[p]);
  425. (++p == 3) ? (p = 0) : 0;
  426. }