da830_pinmux.c 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /*
  2. * Pinmux configurations for the DA830 SoCs
  3. *
  4. * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <common.h>
  21. #include <asm/arch/davinci_misc.h>
  22. #include <asm/arch/hardware.h>
  23. #include <asm/arch/pinmux_defs.h>
  24. /* SPI0 pin muxer settings */
  25. const struct pinmux_config spi0_pins_base[] = {
  26. { pinmux(7), 1, 3 }, /* SPI0_SOMI */
  27. { pinmux(7), 1, 4 }, /* SPI0_SIMO */
  28. { pinmux(7), 1, 6 } /* SPI0_CLK */
  29. };
  30. const struct pinmux_config spi0_pins_scs0[] = {
  31. { pinmux(7), 1, 7 } /* SPI0_SCS[0] */
  32. };
  33. const struct pinmux_config spi0_pins_ena[] = {
  34. { pinmux(7), 1, 5 } /* SPI0_ENA */
  35. };
  36. /* NAND pin muxer settings */
  37. const struct pinmux_config emifa_pins_cs0[] = {
  38. { pinmux(18), 1, 2 } /* EMA_CS[0] */
  39. };
  40. const struct pinmux_config emifa_pins_cs2[] = {
  41. { pinmux(18), 1, 3 } /* EMA_CS[2] */
  42. };
  43. const struct pinmux_config emifa_pins_cs3[] = {
  44. { pinmux(18), 1, 4 } /* EMA_CS[3] */
  45. };
  46. #ifdef CONFIG_USE_NAND
  47. const struct pinmux_config emifa_pins[] = {
  48. { pinmux(13), 1, 6 }, /* EMA_D[0] */
  49. { pinmux(13), 1, 7 }, /* EMA_D[1] */
  50. { pinmux(14), 1, 0 }, /* EMA_D[2] */
  51. { pinmux(14), 1, 1 }, /* EMA_D[3] */
  52. { pinmux(14), 1, 2 }, /* EMA_D[4] */
  53. { pinmux(14), 1, 3 }, /* EMA_D[5] */
  54. { pinmux(14), 1, 4 }, /* EMA_D[6] */
  55. { pinmux(14), 1, 5 }, /* EMA_D[7] */
  56. { pinmux(14), 1, 6 }, /* EMA_D[8] */
  57. { pinmux(14), 1, 7 }, /* EMA_D[9] */
  58. { pinmux(15), 1, 0 }, /* EMA_D[10] */
  59. { pinmux(15), 1, 1 }, /* EMA_D[11] */
  60. { pinmux(15), 1, 2 }, /* EMA_D[12] */
  61. { pinmux(15), 1, 3 }, /* EMA_D[13] */
  62. { pinmux(15), 1, 4 }, /* EMA_D[14] */
  63. { pinmux(15), 1, 5 }, /* EMA_D[15] */
  64. { pinmux(15), 1, 6 }, /* EMA_A[0] */
  65. { pinmux(15), 1, 7 }, /* EMA_A[1] */
  66. { pinmux(16), 1, 0 }, /* EMA_A[2] */
  67. { pinmux(16), 1, 1 }, /* EMA_A[3] */
  68. { pinmux(16), 1, 2 }, /* EMA_A[4] */
  69. { pinmux(16), 1, 3 }, /* EMA_A[5] */
  70. { pinmux(16), 1, 4 }, /* EMA_A[6] */
  71. { pinmux(16), 1, 5 }, /* EMA_A[7] */
  72. { pinmux(16), 1, 6 }, /* EMA_A[8] */
  73. { pinmux(16), 1, 7 }, /* EMA_A[9] */
  74. { pinmux(17), 1, 0 }, /* EMA_A[10] */
  75. { pinmux(17), 1, 1 }, /* EMA_A[11] */
  76. { pinmux(17), 1, 2 }, /* EMA_A[12] */
  77. { pinmux(17), 1, 3 }, /* EMA_BA[1] */
  78. { pinmux(17), 1, 4 }, /* EMA_BA[0] */
  79. { pinmux(17), 1, 5 }, /* EMA_CLK */
  80. { pinmux(17), 1, 6 }, /* EMA_SDCKE */
  81. { pinmux(17), 1, 7 }, /* EMA_CAS */
  82. { pinmux(18), 1, 0 }, /* EMA_CAS */
  83. { pinmux(18), 1, 1 }, /* EMA_WE */
  84. { pinmux(18), 1, 5 }, /* EMA_OE */
  85. { pinmux(18), 1, 6 }, /* EMA_WE_DQM[1] */
  86. { pinmux(18), 1, 7 }, /* EMA_WE_DQM[0] */
  87. { pinmux(10), 1, 0 } /* Tristate */
  88. };
  89. #endif
  90. /* EMAC PHY interface pins */
  91. const struct pinmux_config emac_pins_rmii[] = {
  92. { pinmux(10), 2, 1 }, /* RMII_TXD[0] */
  93. { pinmux(10), 2, 2 }, /* RMII_TXD[1] */
  94. { pinmux(10), 2, 3 }, /* RMII_TXEN */
  95. { pinmux(10), 2, 4 }, /* RMII_CRS_DV */
  96. { pinmux(10), 2, 5 }, /* RMII_RXD[0] */
  97. { pinmux(10), 2, 6 }, /* RMII_RXD[1] */
  98. { pinmux(10), 2, 7 } /* RMII_RXER */
  99. };
  100. const struct pinmux_config emac_pins_mdio[] = {
  101. { pinmux(11), 2, 0 }, /* MDIO_CLK */
  102. { pinmux(11), 2, 1 } /* MDIO_D */
  103. };
  104. const struct pinmux_config emac_pins_rmii_clk_source[] = {
  105. { pinmux(9), 0, 5 } /* ref.clk from external source */
  106. };
  107. /* UART2 pin muxer settings */
  108. const struct pinmux_config uart2_pins_txrx[] = {
  109. { pinmux(8), 2, 7 }, /* UART2_RXD */
  110. { pinmux(9), 2, 0 } /* UART2_TXD */
  111. };
  112. /* I2C0 pin muxer settings */
  113. const struct pinmux_config i2c0_pins[] = {
  114. { pinmux(8), 2, 3 }, /* I2C0_SDA */
  115. { pinmux(8), 2, 4 } /* I2C0_SCL */
  116. };
  117. /* USB0_DRVVBUS pin muxer settings */
  118. const struct pinmux_config usb_pins[] = {
  119. { pinmux(9), 1, 1 } /* USB0_DRVVBUS */
  120. };
  121. #ifdef CONFIG_DAVINCI_MMC
  122. /* MMC0 pin muxer settings */
  123. const struct pinmux_config mmc0_pins_8bit[] = {
  124. { pinmux(15), 2, 7 }, /* MMCSD0_CLK */
  125. { pinmux(16), 2, 0 }, /* MMCSD0_CMD */
  126. { pinmux(13), 2, 6 }, /* MMCSD0_DAT_0 */
  127. { pinmux(13), 2, 7 }, /* MMCSD0_DAT_1 */
  128. { pinmux(14), 2, 0 }, /* MMCSD0_DAT_2 */
  129. { pinmux(14), 2, 1 }, /* MMCSD0_DAT_3 */
  130. { pinmux(14), 2, 2 }, /* MMCSD0_DAT_4 */
  131. { pinmux(14), 2, 3 }, /* MMCSD0_DAT_5 */
  132. { pinmux(14), 2, 4 }, /* MMCSD0_DAT_6 */
  133. { pinmux(14), 2, 5 } /* MMCSD0_DAT_7 */
  134. /* DA830 supports 8-bit mode */
  135. };
  136. #endif