snowball.c 8.1 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2009
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. #include <config.h>
  19. #include <common.h>
  20. #include <malloc.h>
  21. #include <i2c.h>
  22. #include <mmc.h>
  23. #include <asm/types.h>
  24. #include <asm/io.h>
  25. #include <asm/errno.h>
  26. #include <asm/arch/db8500_pincfg.h>
  27. #include <asm/arch/prcmu.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/sys_proto.h>
  30. #ifdef CONFIG_MMC
  31. #include "../../../drivers/mmc/arm_pl180_mmci.h"
  32. #endif
  33. #include "db8500_pins.h"
  34. /*
  35. * Get a global data pointer
  36. */
  37. DECLARE_GLOBAL_DATA_PTR;
  38. /*
  39. * Memory controller register
  40. */
  41. #define DMC_BASE_ADDR 0x80156000
  42. #define DMC_CTL_97 (DMC_BASE_ADDR + 0x184)
  43. /*
  44. * GPIO pin config common for MOP500/HREF boards
  45. */
  46. unsigned long gpio_cfg_common[] = {
  47. /* I2C */
  48. GPIO147_I2C0_SCL,
  49. GPIO148_I2C0_SDA,
  50. GPIO16_I2C1_SCL,
  51. GPIO17_I2C1_SDA,
  52. GPIO10_I2C2_SDA,
  53. GPIO11_I2C2_SCL,
  54. GPIO229_I2C3_SDA,
  55. GPIO230_I2C3_SCL,
  56. /* SSP0, to AB8500 */
  57. GPIO143_SSP0_CLK,
  58. GPIO144_SSP0_FRM,
  59. GPIO145_SSP0_RXD | PIN_PULL_DOWN,
  60. GPIO146_SSP0_TXD,
  61. /* MMC0 (MicroSD card) */
  62. GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
  63. GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
  64. GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
  65. GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
  66. GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
  67. GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
  68. GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
  69. GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
  70. GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
  71. GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
  72. GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
  73. /* MMC4 (On-board eMMC) */
  74. GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
  75. GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
  76. GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
  77. GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
  78. GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
  79. GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
  80. GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
  81. GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
  82. GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
  83. GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
  84. GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
  85. /* UART2, console */
  86. GPIO29_U2_RXD | PIN_INPUT_PULLUP,
  87. GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
  88. GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
  89. GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
  90. /*
  91. * USB, pin 256-267 USB, Is probably already setup correctly from
  92. * BootROM/boot stages, but we don't trust that and set it up anyway
  93. */
  94. GPIO256_USB_NXT,
  95. GPIO257_USB_STP,
  96. GPIO258_USB_XCLK,
  97. GPIO259_USB_DIR,
  98. GPIO260_USB_DAT7,
  99. GPIO261_USB_DAT6,
  100. GPIO262_USB_DAT5,
  101. GPIO263_USB_DAT4,
  102. GPIO264_USB_DAT3,
  103. GPIO265_USB_DAT2,
  104. GPIO266_USB_DAT1,
  105. GPIO267_USB_DAT0,
  106. };
  107. unsigned long gpio_cfg_snowball[] = {
  108. /* MMC0 (MicroSD card) */
  109. GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */
  110. GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */
  111. GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */
  112. /* eMMC */
  113. GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */
  114. /* LAN */
  115. GPIO131_SM_ADQ8,
  116. GPIO132_SM_ADQ9,
  117. GPIO133_SM_ADQ10,
  118. GPIO134_SM_ADQ11,
  119. GPIO135_SM_ADQ12,
  120. GPIO136_SM_ADQ13,
  121. GPIO137_SM_ADQ14,
  122. GPIO138_SM_ADQ15,
  123. /* RSTn_LAN */
  124. GPIO141_GPIO | PIN_OUTPUT_HIGH,
  125. };
  126. /*
  127. * Miscellaneous platform dependent initialisations
  128. */
  129. int board_init(void)
  130. {
  131. /*
  132. * Setup board (bd) and board-info (bi).
  133. * bi_arch_number: Unique id for this board. It will passed in r1 to
  134. * Linux startup code and is the machine_id.
  135. * bi_boot_params: Where this board expects params.
  136. */
  137. gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL;
  138. gd->bd->bi_boot_params = 0x00000100;
  139. /* Configure GPIO pins needed by U-boot */
  140. db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common));
  141. db8500_gpio_config_pins(gpio_cfg_snowball,
  142. ARRAY_SIZE(gpio_cfg_snowball));
  143. return 0;
  144. }
  145. int dram_init(void)
  146. {
  147. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  148. gd->ram_size = gd->bd->bi_dram[0].size =
  149. get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
  150. return 0;
  151. }
  152. static int raise_ab8500_gpio16(void)
  153. {
  154. int ret;
  155. /* selection */
  156. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
  157. if (ret < 0)
  158. goto out;
  159. ret |= 0x80;
  160. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
  161. if (ret < 0)
  162. goto out;
  163. /* direction */
  164. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
  165. if (ret < 0)
  166. goto out;
  167. ret |= 0x80;
  168. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
  169. if (ret < 0)
  170. goto out;
  171. /* out */
  172. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
  173. if (ret < 0)
  174. goto out;
  175. ret |= 0x80;
  176. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
  177. out:
  178. return ret;
  179. }
  180. static int raise_ab8500_gpio26(void)
  181. {
  182. int ret;
  183. /* selection */
  184. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
  185. if (ret < 0)
  186. goto out;
  187. ret |= 0x2;
  188. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
  189. if (ret < 0)
  190. goto out;
  191. /* out */
  192. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
  193. if (ret < 0)
  194. goto out;
  195. ret |= 0x2;
  196. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
  197. out:
  198. return ret;
  199. }
  200. int board_late_init(void)
  201. {
  202. /* enable 3V3 for LAN controller */
  203. if (raise_ab8500_gpio26() >= 0) {
  204. /* Turn on FSMC device */
  205. writel(0x1, 0x8000f000);
  206. writel(0x1, 0x8000f008);
  207. /* setup FSMC for LAN controler */
  208. writel(0x305b, 0x80000000);
  209. /* run at the highest possible speed */
  210. writel(0x01010210, 0x80000004);
  211. } else
  212. printf("error: can't raise GPIO26\n");
  213. /* enable 3v6 for GBF chip */
  214. if ((raise_ab8500_gpio16() < 0))
  215. printf("error: cant' raise GPIO16\n");
  216. /* empty UART RX FIFO */
  217. while (tstc())
  218. (void) getc();
  219. return 0;
  220. }
  221. #ifdef CONFIG_MMC
  222. /*
  223. * emmc_host_init - initialize the emmc controller.
  224. * Configure GPIO settings, set initial clock and power for emmc slot.
  225. * Initialize mmc struct and register with mmc framework.
  226. */
  227. static int emmc_host_init(void)
  228. {
  229. struct pl180_mmc_host *host;
  230. host = malloc(sizeof(struct pl180_mmc_host));
  231. if (!host)
  232. return -ENOMEM;
  233. memset(host, 0, sizeof(*host));
  234. host->base = (struct sdi_registers *)CFG_EMMC_BASE;
  235. host->pwr_init = SDI_PWR_OPD | SDI_PWR_PWRCTRL_ON;
  236. host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
  237. SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
  238. strcpy(host->name, "EMMC");
  239. host->caps = MMC_MODE_8BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz;
  240. host->voltages = VOLTAGE_WINDOW_MMC;
  241. host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
  242. host->clock_max = ARM_MCLK / 2;
  243. host->clock_in = ARM_MCLK;
  244. host->version2 = 1;
  245. return arm_pl180_mmci_init(host);
  246. }
  247. /*
  248. * mmc_host_init - initialize the external mmc controller.
  249. * Configure GPIO settings, set initial clock and power for mmc slot.
  250. * Initialize mmc struct and register with mmc framework.
  251. */
  252. static int mmc_host_init(void)
  253. {
  254. struct pl180_mmc_host *host;
  255. u32 sdi_u32;
  256. host = malloc(sizeof(struct pl180_mmc_host));
  257. if (!host)
  258. return -ENOMEM;
  259. memset(host, 0, sizeof(*host));
  260. host->base = (struct sdi_registers *)CFG_MMC_BASE;
  261. sdi_u32 = 0xBF;
  262. writel(sdi_u32, &host->base->power);
  263. host->pwr_init = 0xBF;
  264. host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
  265. SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
  266. strcpy(host->name, "MMC");
  267. host->caps = MMC_MODE_8BIT;
  268. host->b_max = 0;
  269. host->voltages = VOLTAGE_WINDOW_SD;
  270. host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
  271. host->clock_max = ARM_MCLK / 2;
  272. host->clock_in = ARM_MCLK;
  273. host->version2 = 1;
  274. return arm_pl180_mmci_init(host);
  275. }
  276. /*
  277. * board_mmc_init - initialize all the mmc/sd host controllers.
  278. * Called by generic mmc framework.
  279. */
  280. int board_mmc_init(bd_t *bis)
  281. {
  282. int error;
  283. (void) bis;
  284. error = emmc_host_init();
  285. if (error) {
  286. printf("emmc_host_init() %d\n", error);
  287. return -1;
  288. }
  289. u8500_mmc_power_init();
  290. error = mmc_host_init();
  291. if (error) {
  292. printf("mmc_host_init() %d\n", error);
  293. return -1;
  294. }
  295. return 0;
  296. }
  297. #endif /* CONFIG_MMC */