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ml401
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xparameters.h

xparameters.h 1.5 KB
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  1. /*********************************************************************
    2. 

  2. #
    3. 

  3. # CAUTION: This file is automatically generated by libgen.
    4. 

  4. # Version: Xilinx EDK 6.3 EDK_Gmm.12.3
    5. 

  5. # Description: U-BOOT Configuration File
    6. 

  6. # Michal Simek - monstr@monstr.eu
    7. 

  7. #
    8. 

  8. **********************************************************************/
    9. 

  9. 

  10. /* System Clock Frequency */
    11. 

  11. #define XILINX_CLOCK_FREQ	66666667
    12. 

  12. 

  13. /* Interrupt controller is intc_0 */
    14. 

  14. #define XILINX_INTC_BASEADDR	0xd1000fc0
    15. 

  15. #define XILINX_INTC_NUM_INTR_INPUTS	12
    16. 

  16. 

  17. /* Timer pheriphery is opb_timer_0 */
    18. 

  18. #define XILINX_TIMER_BASEADDR	0xa2000000
    19. 

  19. #define XILINX_TIMER_IRQ	0
    20. 

  20. 

  21. /* Uart pheriphery is console_uart */
    22. 

  22. #define XILINX_UART_BASEADDR	0xa0000000
    23. 

  23. #define XILINX_UART_BAUDRATE	115200
    24. 

  24. 

  25. /* GPIO is opb_gpio_0*/
    26. 

  26. #define XILINX_GPIO_BASEADDR	0x90000000
    27. 

  27. 

  28. /* Flash Memory is opb_emc_0 */
    29. 

  29. #define XILINX_FLASH_START	0x28000000
    30. 

  30. #define XILINX_FLASH_SIZE	0x00800000
    31. 

  31. 

  32. /* Main Memory is plb_ddr_0 */
    33. 

  33. #define XILINX_RAM_START	0x10000000
    34. 

  34. #define XILINX_RAM_SIZE	0x10000000
    35. 

  35. 

  36. /* Sysace Controller is opb_sysace_0 */
    37. 

  37. #define XILINX_SYSACE_BASEADDR	0xCF000000
    38. 

  38. #define XILINX_SYSACE_HIGHADDR	0xCF0001FF
    39. 

  39. #define XILINX_SYSACE_MEM_WIDTH	16
    40. 

  40. 

  41. /* Ethernet controller is opb_ethernet_0 */
    42. 

  42. #define XPAR_XEMAC_NUM_INSTANCES	1
    43. 

  43. #define XPAR_OPB_ETHERNET_0_DEVICE_ID	0
    44. 

  44. #define XPAR_OPB_ETHERNET_0_BASEADDR	0x60000000
    45. 

  45. #define XPAR_OPB_ETHERNET_0_HIGHADDR	0x60003FFF
    46. 

  46. #define XPAR_OPB_ETHERNET_0_DMA_PRESENT	1
    47. 

  47. #define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST	1
    48. 

  48. #define XPAR_OPB_ETHERNET_0_MII_EXIST	1
    49.