serial_pl01x.c 4.9 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  4. *
  5. * (C) Copyright 2004
  6. * ARM Ltd.
  7. * Philippe Robin, <philippe.robin@arm.com>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. /* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
  28. #include <common.h>
  29. #include <watchdog.h>
  30. #include "serial_pl01x.h"
  31. #define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
  32. #define IO_READ(addr) (*(volatile unsigned int *)(addr))
  33. /*
  34. * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
  35. * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
  36. * Versatile PB has four UARTs.
  37. */
  38. #define CONSOLE_PORT CONFIG_CONS_INDEX
  39. #define baudRate CONFIG_BAUDRATE
  40. static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
  41. #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
  42. static void pl01x_putc (int portnum, char c);
  43. static int pl01x_getc (int portnum);
  44. static int pl01x_tstc (int portnum);
  45. #ifdef CONFIG_PL010_SERIAL
  46. int serial_init (void)
  47. {
  48. unsigned int divisor;
  49. /*
  50. ** First, disable everything.
  51. */
  52. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
  53. /*
  54. ** Set baud rate
  55. **
  56. */
  57. switch (baudRate) {
  58. case 9600:
  59. divisor = UART_PL010_BAUD_9600;
  60. break;
  61. case 19200:
  62. divisor = UART_PL010_BAUD_9600;
  63. break;
  64. case 38400:
  65. divisor = UART_PL010_BAUD_38400;
  66. break;
  67. case 57600:
  68. divisor = UART_PL010_BAUD_57600;
  69. break;
  70. case 115200:
  71. divisor = UART_PL010_BAUD_115200;
  72. break;
  73. default:
  74. divisor = UART_PL010_BAUD_38400;
  75. }
  76. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
  77. ((divisor & 0xf00) >> 8));
  78. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
  79. /*
  80. ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
  81. */
  82. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
  83. (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
  84. /*
  85. ** Finally, enable the UART
  86. */
  87. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
  88. return 0;
  89. }
  90. #endif /* CONFIG_PL010_SERIAL */
  91. #ifdef CONFIG_PL011_SERIAL
  92. int serial_init (void)
  93. {
  94. unsigned int temp;
  95. unsigned int divider;
  96. unsigned int remainder;
  97. unsigned int fraction;
  98. /*
  99. ** First, disable everything.
  100. */
  101. IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
  102. /*
  103. ** Set baud rate
  104. **
  105. ** IBRD = UART_CLK / (16 * BAUD_RATE)
  106. ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
  107. */
  108. temp = 16 * baudRate;
  109. divider = CONFIG_PL011_CLOCK / temp;
  110. remainder = CONFIG_PL011_CLOCK % temp;
  111. temp = (8 * remainder) / baudRate;
  112. fraction = (temp >> 1) + (temp & 1);
  113. IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
  114. IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
  115. /*
  116. ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
  117. */
  118. IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
  119. (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
  120. /*
  121. ** Finally, enable the UART
  122. */
  123. IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
  124. (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
  125. UART_PL011_CR_RXE));
  126. return 0;
  127. }
  128. #endif /* CONFIG_PL011_SERIAL */
  129. void serial_putc (const char c)
  130. {
  131. if (c == '\n')
  132. pl01x_putc (CONSOLE_PORT, '\r');
  133. pl01x_putc (CONSOLE_PORT, c);
  134. }
  135. void serial_puts (const char *s)
  136. {
  137. while (*s) {
  138. serial_putc (*s++);
  139. }
  140. }
  141. int serial_getc (void)
  142. {
  143. return pl01x_getc (CONSOLE_PORT);
  144. }
  145. int serial_tstc (void)
  146. {
  147. return pl01x_tstc (CONSOLE_PORT);
  148. }
  149. void serial_setbrg (void)
  150. {
  151. }
  152. static void pl01x_putc (int portnum, char c)
  153. {
  154. /* Wait until there is space in the FIFO */
  155. while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
  156. WATCHDOG_RESET();
  157. /* Send the character */
  158. IO_WRITE (port[portnum] + UART_PL01x_DR, c);
  159. }
  160. static int pl01x_getc (int portnum)
  161. {
  162. unsigned int data;
  163. /* Wait until there is data in the FIFO */
  164. while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
  165. WATCHDOG_RESET();
  166. data = IO_READ (port[portnum] + UART_PL01x_DR);
  167. /* Check for an error flag */
  168. if (data & 0xFFFFFF00) {
  169. /* Clear the error */
  170. IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
  171. return -1;
  172. }
  173. return (int) data;
  174. }
  175. static int pl01x_tstc (int portnum)
  176. {
  177. WATCHDOG_RESET();
  178. return !(IO_READ (port[portnum] + UART_PL01x_FR) &
  179. UART_PL01x_FR_RXFE);
  180. }