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Makefile
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58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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%!s(int64=16) %!d(string=hai) anos |
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common_timing_params.h
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58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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%!s(int64=16) %!d(string=hai) anos |
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ctrl_regs.c
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1f293b417a
Add debug information for DDR controller registers
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%!s(int64=16) %!d(string=hai) anos |
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ddr.h
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dfb49108e4
Pass dimm parameters to populate populate controller options
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%!s(int64=16) %!d(string=hai) anos |
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ddr1_dimm_params.c
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05c05a2363
FSL DDR: Add DDR1 DIMM paramter support
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%!s(int64=16) %!d(string=hai) anos |
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ddr2_dimm_params.c
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233fdd502a
FSL DDR: Add DDR2 DIMM paramter support
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%!s(int64=16) %!d(string=hai) anos |
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lc_common_dimm_params.c
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58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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%!s(int64=16) %!d(string=hai) anos |
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main.c
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7008d26a40
fsl ddr skip interleaving if not supported.
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%!s(int64=16) %!d(string=hai) anos |
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options.c
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7008d26a40
fsl ddr skip interleaving if not supported.
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%!s(int64=16) %!d(string=hai) anos |
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util.c
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58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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%!s(int64=16) %!d(string=hai) anos |
Ed Swarthout
7008d26a40
fsl ddr skip interleaving if not supported.