ehci-exynos.c 4.7 KB

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  1. /*
  2. * SAMSUNG EXYNOS USB HOST EHCI Controller
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  5. * Vivek Gautam <gautam.vivek@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20. * MA 02110-1301 USA
  21. */
  22. #include <common.h>
  23. #include <fdtdec.h>
  24. #include <libfdt.h>
  25. #include <malloc.h>
  26. #include <usb.h>
  27. #include <asm/arch/cpu.h>
  28. #include <asm/arch/ehci.h>
  29. #include <asm/arch/system.h>
  30. #include <asm/arch/power.h>
  31. #include <asm-generic/errno.h>
  32. #include <linux/compat.h>
  33. #include "ehci.h"
  34. /* Declare global data pointer */
  35. DECLARE_GLOBAL_DATA_PTR;
  36. /**
  37. * Contains pointers to register base addresses
  38. * for the usb controller.
  39. */
  40. struct exynos_ehci {
  41. struct exynos_usb_phy *usb;
  42. unsigned int *hcd;
  43. };
  44. static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
  45. {
  46. unsigned int node;
  47. int depth;
  48. node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_EHCI);
  49. if (node <= 0) {
  50. debug("EHCI: Can't get device node for ehci\n");
  51. return -ENODEV;
  52. }
  53. /*
  54. * Get the base address for EHCI controller from the device node
  55. */
  56. exynos->hcd = (unsigned int *)fdtdec_get_addr(blob, node, "reg");
  57. if (exynos->hcd == NULL) {
  58. debug("Can't get the EHCI register address\n");
  59. return -ENXIO;
  60. }
  61. depth = 0;
  62. node = fdtdec_next_compatible_subnode(blob, node,
  63. COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth);
  64. if (node <= 0) {
  65. debug("EHCI: Can't get device node for usb-phy controller\n");
  66. return -ENODEV;
  67. }
  68. /*
  69. * Get the base address for usbphy from the device node
  70. */
  71. exynos->usb = (struct exynos_usb_phy *)fdtdec_get_addr(blob, node,
  72. "reg");
  73. if (exynos->usb == NULL) {
  74. debug("Can't get the usbphy register address\n");
  75. return -ENXIO;
  76. }
  77. return 0;
  78. }
  79. /* Setup the EHCI host controller. */
  80. static void setup_usb_phy(struct exynos_usb_phy *usb)
  81. {
  82. set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
  83. set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
  84. clrbits_le32(&usb->usbphyctrl0,
  85. HOST_CTRL0_FSEL_MASK |
  86. HOST_CTRL0_COMMONON_N |
  87. /* HOST Phy setting */
  88. HOST_CTRL0_PHYSWRST |
  89. HOST_CTRL0_PHYSWRSTALL |
  90. HOST_CTRL0_SIDDQ |
  91. HOST_CTRL0_FORCESUSPEND |
  92. HOST_CTRL0_FORCESLEEP);
  93. setbits_le32(&usb->usbphyctrl0,
  94. /* Setting up the ref freq */
  95. (CLK_24MHZ << 16) |
  96. /* HOST Phy setting */
  97. HOST_CTRL0_LINKSWRST |
  98. HOST_CTRL0_UTMISWRST);
  99. udelay(10);
  100. clrbits_le32(&usb->usbphyctrl0,
  101. HOST_CTRL0_LINKSWRST |
  102. HOST_CTRL0_UTMISWRST);
  103. udelay(20);
  104. /* EHCI Ctrl setting */
  105. setbits_le32(&usb->ehcictrl,
  106. EHCICTRL_ENAINCRXALIGN |
  107. EHCICTRL_ENAINCR4 |
  108. EHCICTRL_ENAINCR8 |
  109. EHCICTRL_ENAINCR16);
  110. }
  111. /* Reset the EHCI host controller. */
  112. static void reset_usb_phy(struct exynos_usb_phy *usb)
  113. {
  114. /* HOST_PHY reset */
  115. setbits_le32(&usb->usbphyctrl0,
  116. HOST_CTRL0_PHYSWRST |
  117. HOST_CTRL0_PHYSWRSTALL |
  118. HOST_CTRL0_SIDDQ |
  119. HOST_CTRL0_FORCESUSPEND |
  120. HOST_CTRL0_FORCESLEEP);
  121. set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
  122. }
  123. /*
  124. * EHCI-initialization
  125. * Create the appropriate control structures to manage
  126. * a new EHCI host controller.
  127. */
  128. int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  129. {
  130. struct exynos_ehci *exynos = NULL;
  131. exynos = (struct exynos_ehci *)
  132. kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
  133. if (!exynos) {
  134. debug("failed to allocate exynos ehci context\n");
  135. return -ENOMEM;
  136. }
  137. exynos_usb_parse_dt(gd->fdt_blob, exynos);
  138. setup_usb_phy(exynos->usb);
  139. *hccr = (struct ehci_hccr *)(exynos->hcd);
  140. *hcor = (struct ehci_hcor *)((uint32_t) *hccr
  141. + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
  142. debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
  143. (uint32_t)*hccr, (uint32_t)*hcor,
  144. (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
  145. kfree(exynos);
  146. return 0;
  147. }
  148. /*
  149. * Destroy the appropriate control structures corresponding
  150. * the EHCI host controller.
  151. */
  152. int ehci_hcd_stop(int index)
  153. {
  154. struct exynos_ehci *exynos = NULL;
  155. exynos = (struct exynos_ehci *)
  156. kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
  157. if (!exynos) {
  158. debug("failed to allocate exynos ehci context\n");
  159. return -ENOMEM;
  160. }
  161. exynos_usb_parse_dt(gd->fdt_blob, exynos);
  162. reset_usb_phy(exynos->usb);
  163. kfree(exynos);
  164. return 0;
  165. }