rsk7264.h 2.4 KB

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  1. /*
  2. * Configuation settings for the Renesas RSK2+SH7264 board
  3. *
  4. * Copyright (C) 2011 Renesas Electronics Europe Ltd.
  5. * Copyright (C) 2008 Nobuhiro Iwamatsu
  6. * Copyright (C) 2008 Renesas Solutions Corp.
  7. *
  8. * This file is released under the terms of GPL v2 and any later version.
  9. * See the file COPYING in the root directory of the source tree for details.
  10. */
  11. #ifndef __RSK7264_H
  12. #define __RSK7264_H
  13. #undef DEBUG
  14. #define CONFIG_SH 1
  15. #define CONFIG_SH2 1
  16. #define CONFIG_SH2A 1
  17. #define CONFIG_CPU_SH7264 1
  18. #define CONFIG_RSK7264 1
  19. #ifndef _CONFIG_CMD_DEFAULT_H
  20. # include <config_cmd_default.h>
  21. #endif
  22. #define CONFIG_BAUDRATE 115200
  23. #define CONFIG_BOOTARGS "console=ttySC3,115200"
  24. #define CONFIG_BOOTDELAY 3
  25. #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
  26. #define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
  27. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  28. #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
  29. #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
  30. #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
  31. /* Serial */
  32. #define CONFIG_SCIF_CONSOLE 1
  33. #define CONFIG_CONS_SCIF3 1
  34. /* Memory */
  35. /* u-boot relocated to top 256KB of ram */
  36. #define CONFIG_SYS_TEXT_BASE 0x0CFC0000
  37. #define CONFIG_SYS_SDRAM_BASE 0x0C000000
  38. #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
  39. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  40. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
  41. #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
  42. #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
  43. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024)
  44. /* Flash */
  45. #define CONFIG_FLASH_CFI_DRIVER
  46. #define CONFIG_SYS_FLASH_CFI
  47. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  48. #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */
  49. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  50. #define CONFIG_SYS_MAX_FLASH_SECT 512
  51. #define CONFIG_ENV_IS_IN_FLASH 1
  52. #define CONFIG_ENV_OFFSET (128 * 1024)
  53. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  54. #define CONFIG_ENV_SECT_SIZE (128 * 1024)
  55. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  56. /* Board Clock */
  57. #define CONFIG_SYS_CLK_FREQ 36000000
  58. #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
  59. #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
  60. /* Network interface */
  61. #define CONFIG_SMC911X
  62. #define CONFIG_SMC911X_16_BIT
  63. #define CONFIG_SMC911X_BASE 0x28000000
  64. #endif /* __RSK7264_H */