nand_ecc.c 6.7 KB

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  1. /*
  2. * This file contains an ECC algorithm from Toshiba that detects and
  3. * corrects 1 bit errors in a 256 byte block of data.
  4. *
  5. * drivers/mtd/nand/nand_ecc.c
  6. *
  7. * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
  8. * Toshiba America Electronics Components, Inc.
  9. *
  10. * Copyright (C) 2006 Thomas Gleixner <tglx@linutronix.de>
  11. *
  12. * This file is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 or (at your option) any
  15. * later version.
  16. *
  17. * This file is distributed in the hope that it will be useful, but WITHOUT
  18. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  20. * for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License along
  23. * with this file; if not, write to the Free Software Foundation, Inc.,
  24. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  25. *
  26. * As a special exception, if other files instantiate templates or use
  27. * macros or inline functions from these files, or you compile these
  28. * files and link them with other works to produce a work based on these
  29. * files, these files do not by themselves cause the resulting work to be
  30. * covered by the GNU General Public License. However the source code for
  31. * these files must still be made available in accordance with section (3)
  32. * of the GNU General Public License.
  33. *
  34. * This exception does not invalidate any other reasons why a work based on
  35. * this file might be covered by the GNU General Public License.
  36. */
  37. #include <common.h>
  38. #include <asm/errno.h>
  39. #include <linux/mtd/mtd.h>
  40. /* The PPC4xx NDFC uses Smart Media (SMC) bytes order */
  41. #ifdef CONFIG_NAND_NDFC
  42. #define CONFIG_MTD_NAND_ECC_SMC
  43. #endif
  44. /*
  45. * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(),
  46. * only nand_correct_data() is needed
  47. */
  48. #ifndef CONFIG_NAND_SPL
  49. /*
  50. * Pre-calculated 256-way 1 byte column parity
  51. */
  52. static const u_char nand_ecc_precalc_table[] = {
  53. 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
  54. 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
  55. 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
  56. 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
  57. 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
  58. 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
  59. 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
  60. 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
  61. 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
  62. 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
  63. 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
  64. 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
  65. 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
  66. 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
  67. 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
  68. 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
  69. };
  70. /**
  71. * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256-byte block
  72. * @mtd: MTD block structure
  73. * @dat: raw data
  74. * @ecc_code: buffer for ECC
  75. */
  76. int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
  77. u_char *ecc_code)
  78. {
  79. uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
  80. int i;
  81. /* Initialize variables */
  82. reg1 = reg2 = reg3 = 0;
  83. /* Build up column parity */
  84. for(i = 0; i < 256; i++) {
  85. /* Get CP0 - CP5 from table */
  86. idx = nand_ecc_precalc_table[*dat++];
  87. reg1 ^= (idx & 0x3f);
  88. /* All bit XOR = 1 ? */
  89. if (idx & 0x40) {
  90. reg3 ^= (uint8_t) i;
  91. reg2 ^= ~((uint8_t) i);
  92. }
  93. }
  94. /* Create non-inverted ECC code from line parity */
  95. tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */
  96. tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
  97. tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
  98. tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
  99. tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
  100. tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
  101. tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
  102. tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
  103. tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */
  104. tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
  105. tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
  106. tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
  107. tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
  108. tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
  109. tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
  110. tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
  111. /* Calculate final ECC code */
  112. #ifdef CONFIG_MTD_NAND_ECC_SMC
  113. ecc_code[0] = ~tmp2;
  114. ecc_code[1] = ~tmp1;
  115. #else
  116. ecc_code[0] = ~tmp1;
  117. ecc_code[1] = ~tmp2;
  118. #endif
  119. ecc_code[2] = ((~reg1) << 2) | 0x03;
  120. return 0;
  121. }
  122. #endif /* CONFIG_NAND_SPL */
  123. static inline int countbits(uint32_t byte)
  124. {
  125. int res = 0;
  126. for (;byte; byte >>= 1)
  127. res += byte & 0x01;
  128. return res;
  129. }
  130. /**
  131. * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
  132. * @mtd: MTD block structure
  133. * @dat: raw data read from the chip
  134. * @read_ecc: ECC from the chip
  135. * @calc_ecc: the ECC calculated from raw data
  136. *
  137. * Detect and correct a 1 bit error for 256 byte block
  138. */
  139. int nand_correct_data(struct mtd_info *mtd, u_char *dat,
  140. u_char *read_ecc, u_char *calc_ecc)
  141. {
  142. uint8_t s0, s1, s2;
  143. #ifdef CONFIG_MTD_NAND_ECC_SMC
  144. s0 = calc_ecc[0] ^ read_ecc[0];
  145. s1 = calc_ecc[1] ^ read_ecc[1];
  146. s2 = calc_ecc[2] ^ read_ecc[2];
  147. #else
  148. s1 = calc_ecc[0] ^ read_ecc[0];
  149. s0 = calc_ecc[1] ^ read_ecc[1];
  150. s2 = calc_ecc[2] ^ read_ecc[2];
  151. #endif
  152. if ((s0 | s1 | s2) == 0)
  153. return 0;
  154. /* Check for a single bit error */
  155. if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
  156. ((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
  157. ((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
  158. uint32_t byteoffs, bitnum;
  159. byteoffs = (s1 << 0) & 0x80;
  160. byteoffs |= (s1 << 1) & 0x40;
  161. byteoffs |= (s1 << 2) & 0x20;
  162. byteoffs |= (s1 << 3) & 0x10;
  163. byteoffs |= (s0 >> 4) & 0x08;
  164. byteoffs |= (s0 >> 3) & 0x04;
  165. byteoffs |= (s0 >> 2) & 0x02;
  166. byteoffs |= (s0 >> 1) & 0x01;
  167. bitnum = (s2 >> 5) & 0x04;
  168. bitnum |= (s2 >> 4) & 0x02;
  169. bitnum |= (s2 >> 3) & 0x01;
  170. dat[byteoffs] ^= (1 << bitnum);
  171. return 1;
  172. }
  173. if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
  174. return 1;
  175. return -EBADMSG;
  176. }