qong.h 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280
  1. /*
  2. * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
  3. *
  4. * Configuration settings for the Dave/DENX QongEVB-LITE board.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of
  9. * the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19. * MA 02111-1307 USA
  20. */
  21. #ifndef __CONFIG_H
  22. #define __CONFIG_H
  23. #include <asm/arch/mx31-regs.h>
  24. /* High Level Configuration Options */
  25. #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
  26. #define CONFIG_MX31 1 /* in a mx31 */
  27. #define CONFIG_QONG 1
  28. #define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
  29. #define CONFIG_MX31_CLK32 32768
  30. #define CONFIG_DISPLAY_CPUINFO
  31. #define CONFIG_DISPLAY_BOARDINFO
  32. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  33. #define CONFIG_SETUP_MEMORY_TAGS 1
  34. #define CONFIG_INITRD_TAG 1
  35. /*
  36. * Size of malloc() pool
  37. */
  38. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  39. /* size in bytes reserved for initial data */
  40. #define CONFIG_SYS_GBL_DATA_SIZE 128
  41. /*
  42. * Hardware drivers
  43. */
  44. #define CONFIG_MXC_UART 1
  45. #define CONFIG_SYS_MX31_UART1 1
  46. #define CONFIG_MX31_GPIO
  47. #define CONFIG_MXC_SPI
  48. #define CONFIG_DEFAULT_SPI_BUS 1
  49. #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
  50. #define CONFIG_RTC_MC13783
  51. #define CONFIG_FSL_PMIC
  52. #define CONFIG_FSL_PMIC_BUS 1
  53. #define CONFIG_FSL_PMIC_CS 0
  54. #define CONFIG_FSL_PMIC_CLK 100000
  55. #define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
  56. /* FPGA */
  57. #define CONFIG_QONG_FPGA 1
  58. #define CONFIG_FPGA_BASE (CS1_BASE)
  59. #ifdef CONFIG_QONG_FPGA
  60. /* Ethernet */
  61. #define CONFIG_DNET 1
  62. #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
  63. #define CONFIG_NET_MULTI 1
  64. /* Framebuffer and LCD */
  65. #define CONFIG_LCD
  66. #define CONFIG_VIDEO_MX3
  67. #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
  68. #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  69. #define LCD_BPP LCD_COLOR16
  70. #define CONFIG_SPLASH_SCREEN
  71. #define CONFIG_CMD_BMP
  72. #define CONFIG_BMP_16BPP
  73. #define CONFIG_DISPLAY_VBEST_VGG322403
  74. /*
  75. * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
  76. * initial TFTP transfer, should the user wish one, significantly.
  77. */
  78. #define CONFIG_ARP_TIMEOUT 200UL
  79. #endif /* CONFIG_QONG_FPGA */
  80. #define CONFIG_CONS_INDEX 1
  81. #define CONFIG_BAUDRATE 115200
  82. #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
  83. /***********************************************************
  84. * Command definition
  85. ***********************************************************/
  86. #include <config_cmd_default.h>
  87. #define CONFIG_CMD_PING
  88. #define CONFIG_CMD_DHCP
  89. #define CONFIG_CMD_NET
  90. #define CONFIG_CMD_MII
  91. #define CONFIG_CMD_NAND
  92. #define CONFIG_CMD_SPI
  93. #define CONFIG_CMD_DATE
  94. #define BOARD_LATE_INIT
  95. /*
  96. * You can compile in a MAC address and your custom net settings by using
  97. * the following syntax.
  98. *
  99. * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
  100. * #define CONFIG_SERVERIP <server ip>
  101. * #define CONFIG_IPADDR <board ip>
  102. * #define CONFIG_GATEWAYIP <gateway ip>
  103. * #define CONFIG_NETMASK <your netmask>
  104. */
  105. #define CONFIG_BOOTDELAY 5
  106. #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
  107. #define xstr(s) str(s)
  108. #define str(s) #s
  109. #define CONFIG_EXTRA_ENV_SETTINGS \
  110. "netdev=eth0\0" \
  111. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  112. "nfsroot=${serverip}:${rootpath}\0" \
  113. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  114. "addip=setenv bootargs ${bootargs} " \
  115. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  116. ":${hostname}:${netdev}:off panic=1\0" \
  117. "addtty=setenv bootargs ${bootargs}" \
  118. " console=ttymxc0,${baudrate}\0" \
  119. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  120. "addmisc=setenv bootargs ${bootargs}\0" \
  121. "uboot_addr=a0000000\0" \
  122. "kernel_addr=a0080000\0" \
  123. "ramdisk_addr=a0300000\0" \
  124. "u-boot=qong/u-boot.bin\0" \
  125. "kernel_addr_r=80800000\0" \
  126. "hostname=qong\0" \
  127. "bootfile=qong/uImage\0" \
  128. "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
  129. "flash_self=run ramargs addip addtty addmtd addmisc;" \
  130. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  131. "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
  132. "bootm ${kernel_addr}\0" \
  133. "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
  134. "run nfsargs addip addtty addmtd addmisc;" \
  135. "bootm\0" \
  136. "bootcmd=run flash_self\0" \
  137. "load=tftp ${loadaddr} ${u-boot}\0" \
  138. "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
  139. " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
  140. " +${filesize};cp.b ${fileaddr} " \
  141. xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
  142. "upd=run load update\0" \
  143. /*
  144. * Miscellaneous configurable options
  145. */
  146. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  147. #define CONFIG_SYS_PROMPT "=> "
  148. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  149. /* Print Buffer Size */
  150. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  151. sizeof(CONFIG_SYS_PROMPT) + 16)
  152. #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
  153. /* Boot Argument Buffer Size */
  154. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  155. /* memtest works on first 255MB of RAM */
  156. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
  157. #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
  158. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  159. #define CONFIG_SYS_HZ 1000
  160. #define CONFIG_CMDLINE_EDITING 1
  161. #define CONFIG_MISC_INIT_R 1
  162. /*-----------------------------------------------------------------------
  163. * Stack sizes
  164. *
  165. * The stack sizes are set up in start.S using the settings below
  166. */
  167. #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
  168. /*-----------------------------------------------------------------------
  169. * Physical Memory Map
  170. */
  171. #define CONFIG_NR_DRAM_BANKS 1
  172. #define PHYS_SDRAM_1 CSD0_BASE
  173. #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
  174. /*
  175. * NAND driver
  176. */
  177. #ifndef __ASSEMBLY__
  178. extern void qong_nand_plat_init(void *chip);
  179. extern int qong_nand_rdy(void *chip);
  180. #endif
  181. #define CONFIG_NAND_PLAT
  182. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  183. #define CONFIG_SYS_NAND_BASE CS3_BASE
  184. #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
  185. #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
  186. #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
  187. #define QONG_NAND_WRITE(addr, cmd) \
  188. do { \
  189. __REG8(addr) = cmd; \
  190. } while (0)
  191. #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
  192. #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
  193. #define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
  194. /*-----------------------------------------------------------------------
  195. * FLASH and environment organization
  196. */
  197. #define CONFIG_SYS_FLASH_BASE CS0_BASE
  198. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  199. /* max number of sectors on one chip */
  200. #define CONFIG_SYS_MAX_FLASH_SECT 1024
  201. /* Monitor at beginning of flash */
  202. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  203. #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
  204. #define CONFIG_ENV_IS_IN_FLASH 1
  205. #define CONFIG_ENV_SECT_SIZE 0x20000
  206. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  207. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000)
  208. /* Address and size of Redundant Environment Sector */
  209. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
  210. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  211. /*-----------------------------------------------------------------------
  212. * CFI FLASH driver setup
  213. */
  214. /* Flash memory is CFI compliant */
  215. #define CONFIG_SYS_FLASH_CFI 1
  216. /* Use drivers/cfi_flash.c */
  217. #define CONFIG_FLASH_CFI_DRIVER 1
  218. /* Use buffered writes (~10x faster) */
  219. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  220. /* Use hardware sector protection */
  221. #define CONFIG_SYS_FLASH_PROTECTION 1
  222. /*
  223. * Filesystem
  224. */
  225. #define CONFIG_CMD_JFFS2
  226. #define CONFIG_CMD_UBI
  227. #define CONFIG_CMD_UBIFS
  228. #define CONFIG_RBTREE
  229. #define CONFIG_MTD_PARTITIONS
  230. #define CONFIG_CMD_MTDPARTS
  231. #define CONFIG_LZO
  232. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  233. #define CONFIG_FLASH_CFI_MTD
  234. #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
  235. #define MTDPARTS_DEFAULT \
  236. "mtdparts=physmap-flash.0:256k(U-Boot),128k(env1)," \
  237. "128k(env2),2560k(kernel),13m(ramdisk),-(user)"
  238. #endif /* __CONFIG_H */