flash.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493
  1. /*
  2. * (C) Copyright 2001
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2001-2004
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * (C) Copyright 2003
  9. * Texas Instruments, <www.ti.com>
  10. * Kshitij Gupta <Kshitij@ti.com>
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #include <common.h>
  31. #include <linux/byteorder/swab.h>
  32. #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
  33. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  34. /* Board support for 1 or 2 flash devices */
  35. #undef FLASH_PORT_WIDTH32
  36. #define FLASH_PORT_WIDTH16
  37. #ifdef FLASH_PORT_WIDTH16
  38. #define FLASH_PORT_WIDTH ushort
  39. #define FLASH_PORT_WIDTHV vu_short
  40. #define SWAP(x) __swab16(x)
  41. #else
  42. #define FLASH_PORT_WIDTH ulong
  43. #define FLASH_PORT_WIDTHV vu_long
  44. #define SWAP(x) __swab32(x)
  45. #endif
  46. #define FPW FLASH_PORT_WIDTH
  47. #define FPWV FLASH_PORT_WIDTHV
  48. #define mb() __asm__ __volatile__ ("" : : : "memory")
  49. /* Flash Organization Structure */
  50. typedef struct OrgDef {
  51. unsigned int sector_number;
  52. unsigned int sector_size;
  53. } OrgDef;
  54. /* Flash Organizations */
  55. OrgDef OrgIntel_28F256L18T[] = {
  56. {4, 32 * 1024}, /* 4 * 32kBytes sectors */
  57. {255, 128 * 1024}, /* 255 * 128kBytes sectors */
  58. };
  59. /*-----------------------------------------------------------------------
  60. * Functions
  61. */
  62. unsigned long flash_init (void);
  63. static ulong flash_get_size (FPW * addr, flash_info_t * info);
  64. static int write_data (flash_info_t * info, ulong dest, FPW data);
  65. static void flash_get_offsets (ulong base, flash_info_t * info);
  66. void inline spin_wheel (void);
  67. void flash_print_info (flash_info_t * info);
  68. void flash_unprotect_sectors (FPWV * addr);
  69. int flash_erase (flash_info_t * info, int s_first, int s_last);
  70. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
  71. void flash_unlock(flash_info_t * info);
  72. /*-----------------------------------------------------------------------
  73. */
  74. unsigned long flash_init (void)
  75. {
  76. int i;
  77. ulong size = 0;
  78. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  79. switch (i) {
  80. case 0:
  81. flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[i]);
  82. flash_get_offsets (CFG_FLASH_BASE, &flash_info[i]);
  83. /* to reset the lock bit */
  84. flash_unlock(&flash_info[i]);
  85. break;
  86. default:
  87. panic ("configured too many flash banks!\n");
  88. break;
  89. }
  90. size += flash_info[i].size;
  91. }
  92. /* Protect monitor and environment sectors
  93. */
  94. flash_protect (FLAG_PROTECT_SET,
  95. CFG_FLASH_BASE,
  96. CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
  97. flash_protect (FLAG_PROTECT_SET,
  98. CONFIG_ENV_ADDR,
  99. CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
  100. return size;
  101. }
  102. /*-----------------------------------------------------------------------
  103. */
  104. void flash_unlock(flash_info_t * info)
  105. {
  106. int j;
  107. for (j=2;j<CFG_MAX_FLASH_SECT;j++){
  108. FPWV *addr = (FPWV *) (info->start[j]);
  109. flash_unprotect_sectors (addr);
  110. *addr = (FPW) 0x00500050;/* clear status register */
  111. *addr = (FPW) 0x00FF00FF;/* resest to read mode */
  112. }
  113. }
  114. /*-----------------------------------------------------------------------
  115. */
  116. static void flash_get_offsets (ulong base, flash_info_t * info)
  117. {
  118. int i;
  119. OrgDef *pOrgDef;
  120. pOrgDef = OrgIntel_28F256L18T;
  121. if (info->flash_id == FLASH_UNKNOWN) {
  122. return;
  123. }
  124. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  125. for (i = 0; i < info->sector_count; i++) {
  126. if (i > 255) {
  127. info->start[i] = base + (i * 0x8000);
  128. info->protect[i] = 0;
  129. } else {
  130. info->start[i] = base +
  131. (i * PHYS_FLASH_SECT_SIZE);
  132. info->protect[i] = 0;
  133. }
  134. }
  135. }
  136. }
  137. /*-----------------------------------------------------------------------
  138. */
  139. void flash_print_info (flash_info_t * info)
  140. {
  141. int i;
  142. if (info->flash_id == FLASH_UNKNOWN) {
  143. printf ("missing or unknown FLASH type\n");
  144. return;
  145. }
  146. switch (info->flash_id & FLASH_VENDMASK) {
  147. case FLASH_MAN_INTEL:
  148. printf ("INTEL ");
  149. break;
  150. default:
  151. printf ("Unknown Vendor ");
  152. break;
  153. }
  154. switch (info->flash_id & FLASH_TYPEMASK) {
  155. case FLASH_28F256L18T:
  156. printf ("FLASH 28F256L18T\n");
  157. break;
  158. default:
  159. printf ("Unknown Chip Type\n");
  160. break;
  161. }
  162. printf (" Size: %ld MB in %d Sectors\n",
  163. info->size >> 20, info->sector_count);
  164. printf (" Sector Start Addresses:");
  165. for (i = 0; i < info->sector_count; ++i) {
  166. if ((i % 5) == 0)
  167. printf ("\n ");
  168. printf (" %08lX%s",
  169. info->start[i], info->protect[i] ? " (RO)" : " ");
  170. }
  171. printf ("\n");
  172. return;
  173. }
  174. /*
  175. * The following code cannot be run from FLASH!
  176. */
  177. static ulong flash_get_size (FPW * addr, flash_info_t * info)
  178. {
  179. volatile FPW value;
  180. /* Write auto select command: read Manufacturer ID */
  181. addr[0x5555] = (FPW) 0x00AA00AA;
  182. addr[0x2AAA] = (FPW) 0x00550055;
  183. addr[0x5555] = (FPW) 0x00900090;
  184. mb ();
  185. value = addr[0];
  186. switch (value) {
  187. case (FPW) INTEL_MANUFACT:
  188. info->flash_id = FLASH_MAN_INTEL;
  189. break;
  190. default:
  191. info->flash_id = FLASH_UNKNOWN;
  192. info->sector_count = 0;
  193. info->size = 0;
  194. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  195. return (0); /* no or unknown flash */
  196. }
  197. mb ();
  198. value = addr[1]; /* device ID */
  199. switch (value) {
  200. case (FPW) (INTEL_ID_28F256L18T):
  201. info->flash_id += FLASH_28F256L18T;
  202. info->sector_count = 259;
  203. info->size = 0x02000000;
  204. break; /* => 32 MB */
  205. default:
  206. info->flash_id = FLASH_UNKNOWN;
  207. break;
  208. }
  209. if (info->sector_count > CFG_MAX_FLASH_SECT) {
  210. printf ("** ERROR: sector count %d > max (%d) **\n",
  211. info->sector_count, CFG_MAX_FLASH_SECT);
  212. info->sector_count = CFG_MAX_FLASH_SECT;
  213. }
  214. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  215. return (info->size);
  216. }
  217. /* unprotects a sector for write and erase
  218. * on some intel parts, this unprotects the entire chip, but it
  219. * wont hurt to call this additional times per sector...
  220. */
  221. void flash_unprotect_sectors (FPWV * addr)
  222. {
  223. #define PD_FINTEL_WSMS_READY_MASK 0x0080
  224. *addr = (FPW) 0x00500050; /* clear status register */
  225. /* this sends the clear lock bit command */
  226. *addr = (FPW) 0x00600060;
  227. *addr = (FPW) 0x00D000D0;
  228. }
  229. /*-----------------------------------------------------------------------
  230. */
  231. int flash_erase (flash_info_t * info, int s_first, int s_last)
  232. {
  233. int flag, prot, sect;
  234. ulong type, start, last;
  235. int rcode = 0;
  236. if ((s_first < 0) || (s_first > s_last)) {
  237. if (info->flash_id == FLASH_UNKNOWN) {
  238. printf ("- missing\n");
  239. } else {
  240. printf ("- no sectors to erase\n");
  241. }
  242. return 1;
  243. }
  244. type = (info->flash_id & FLASH_VENDMASK);
  245. if ((type != FLASH_MAN_INTEL)) {
  246. printf ("Can't erase unknown flash type %08lx - aborted\n",
  247. info->flash_id);
  248. return 1;
  249. }
  250. prot = 0;
  251. for (sect = s_first; sect <= s_last; ++sect) {
  252. if (info->protect[sect]) {
  253. prot++;
  254. }
  255. }
  256. if (prot) {
  257. printf ("- Warning: %d protected sectors will not be erased!\n",
  258. prot);
  259. } else {
  260. printf ("\n");
  261. }
  262. start = get_timer (0);
  263. last = start;
  264. /* Disable interrupts which might cause a timeout here */
  265. flag = disable_interrupts ();
  266. /* Start erase on unprotected sectors */
  267. for (sect = s_first; sect <= s_last; sect++) {
  268. if (info->protect[sect] == 0) { /* not protected */
  269. FPWV *addr = (FPWV *) (info->start[sect]);
  270. FPW status;
  271. printf ("Erasing sector %2d ... ", sect);
  272. flash_unprotect_sectors (addr);
  273. /* arm simple, non interrupt dependent timer */
  274. reset_timer_masked ();
  275. *addr = (FPW) 0x00500050;/* clear status register */
  276. *addr = (FPW) 0x00200020;/* erase setup */
  277. *addr = (FPW) 0x00D000D0;/* erase confirm */
  278. while (((status =
  279. *addr) & (FPW) 0x00800080) !=
  280. (FPW) 0x00800080) {
  281. if (get_timer_masked () >
  282. CFG_FLASH_ERASE_TOUT) {
  283. printf ("Timeout\n");
  284. /* suspend erase */
  285. *addr = (FPW) 0x00B000B0;
  286. /* reset to read mode */
  287. *addr = (FPW) 0x00FF00FF;
  288. rcode = 1;
  289. break;
  290. }
  291. }
  292. /* clear status register cmd. */
  293. *addr = (FPW) 0x00500050;
  294. *addr = (FPW) 0x00FF00FF;/* resest to read mode */
  295. printf (" done\n");
  296. }
  297. }
  298. return rcode;
  299. }
  300. /*-----------------------------------------------------------------------
  301. * Copy memory to flash, returns:
  302. * 0 - OK
  303. * 1 - write timeout
  304. * 2 - Flash not erased
  305. * 4 - Flash not identified
  306. */
  307. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  308. {
  309. ulong cp, wp;
  310. FPW data;
  311. int count, i, l, rc, port_width;
  312. if (info->flash_id == FLASH_UNKNOWN) {
  313. return 4;
  314. }
  315. /* get lower word aligned address */
  316. #ifdef FLASH_PORT_WIDTH16
  317. wp = (addr & ~1);
  318. port_width = 2;
  319. #else
  320. wp = (addr & ~3);
  321. port_width = 4;
  322. #endif
  323. /*
  324. * handle unaligned start bytes
  325. */
  326. if ((l = addr - wp) != 0) {
  327. data = 0;
  328. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  329. data = (data << 8) | (*(uchar *) cp);
  330. }
  331. for (; i < port_width && cnt > 0; ++i) {
  332. data = (data << 8) | *src++;
  333. --cnt;
  334. ++cp;
  335. }
  336. for (; cnt == 0 && i < port_width; ++i, ++cp) {
  337. data = (data << 8) | (*(uchar *) cp);
  338. }
  339. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  340. return (rc);
  341. }
  342. wp += port_width;
  343. }
  344. /*
  345. * handle word aligned part
  346. */
  347. count = 0;
  348. while (cnt >= port_width) {
  349. data = 0;
  350. for (i = 0; i < port_width; ++i) {
  351. data = (data << 8) | *src++;
  352. }
  353. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  354. return (rc);
  355. }
  356. wp += port_width;
  357. cnt -= port_width;
  358. if (count++ > 0x800) {
  359. spin_wheel ();
  360. count = 0;
  361. }
  362. }
  363. if (cnt == 0) {
  364. return (0);
  365. }
  366. /*
  367. * handle unaligned tail bytes
  368. */
  369. data = 0;
  370. for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
  371. data = (data << 8) | *src++;
  372. --cnt;
  373. }
  374. for (; i < port_width; ++i, ++cp) {
  375. data = (data << 8) | (*(uchar *) cp);
  376. }
  377. return (write_data (info, wp, SWAP (data)));
  378. }
  379. /*-----------------------------------------------------------------------
  380. * Write a word or halfword to Flash, returns:
  381. * 0 - OK
  382. * 1 - write timeout
  383. * 2 - Flash not erased
  384. */
  385. static int write_data (flash_info_t * info, ulong dest, FPW data)
  386. {
  387. FPWV *addr = (FPWV *) dest;
  388. ulong status;
  389. int flag;
  390. /* Check if Flash is (sufficiently) erased */
  391. if ((*addr & data) != data) {
  392. printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
  393. return (2);
  394. }
  395. /* Disable interrupts which might cause a timeout here */
  396. flag = disable_interrupts ();
  397. *addr = (FPW) 0x00400040; /* write setup */
  398. *addr = data;
  399. /* arm simple, non interrupt dependent timer */
  400. reset_timer_masked ();
  401. /* wait while polling the status register */
  402. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  403. if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
  404. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  405. return (1);
  406. }
  407. }
  408. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  409. return (0);
  410. }
  411. void inline spin_wheel (void)
  412. {
  413. static int p = 0;
  414. static char w[] = "\\/-";
  415. printf ("\010%c", w[p]);
  416. (++p == 3) ? (p = 0) : 0;
  417. }