flash.c 13 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2001
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  9. * ebenard@eukrea.com
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. #include <common.h>
  30. #include <linux/byteorder/swab.h>
  31. #define CFG_MAX_FLASH_BANKS 1
  32. #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
  33. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  34. #define FLASH_PORT_WIDTH ushort
  35. #define FLASH_PORT_WIDTHV vu_short
  36. #define SWAP(x) __swab16(x)
  37. #define FPW FLASH_PORT_WIDTH
  38. #define FPWV FLASH_PORT_WIDTHV
  39. #define mb() __asm__ __volatile__ ("" : : : "memory")
  40. /* Intel-compatible flash commands */
  41. #define INTEL_PROGRAM 0x00100010
  42. #define INTEL_ERASE 0x00200020
  43. #define INTEL_PROG 0x00400040
  44. #define INTEL_CLEAR 0x00500050
  45. #define INTEL_LOCKBIT 0x00600060
  46. #define INTEL_PROTECT 0x00010001
  47. #define INTEL_STATUS 0x00700070
  48. #define INTEL_READID 0x00900090
  49. #define INTEL_SUSPEND 0x00B000B0
  50. #define INTEL_CONFIRM 0x00D000D0
  51. #define INTEL_RESET 0xFFFFFFFF
  52. /* Intel-compatible flash status bits */
  53. #define INTEL_FINISHED 0x00800080
  54. #define INTEL_OK 0x00800080
  55. /*-----------------------------------------------------------------------
  56. * Functions
  57. */
  58. static ulong flash_get_size (FPW *addr, flash_info_t *info);
  59. static int write_data (flash_info_t *info, ulong dest, FPW data);
  60. static void flash_get_offsets (ulong base, flash_info_t *info);
  61. void inline spin_wheel (void);
  62. /*-----------------------------------------------------------------------
  63. */
  64. unsigned long flash_init (void)
  65. {
  66. int i;
  67. ulong size = 0;
  68. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  69. switch (i) {
  70. case 0:
  71. flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
  72. flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
  73. break;
  74. default:
  75. panic ("configured too many flash banks!\n");
  76. break;
  77. }
  78. size += flash_info[i].size;
  79. }
  80. /* Protect monitor and environment sectors
  81. */
  82. flash_protect ( FLAG_PROTECT_SET,
  83. CFG_FLASH_BASE,
  84. CFG_FLASH_BASE + monitor_flash_len - 1,
  85. &flash_info[0] );
  86. flash_protect ( FLAG_PROTECT_SET,
  87. CFG_ENV_ADDR,
  88. CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
  89. return size;
  90. }
  91. /*-----------------------------------------------------------------------
  92. */
  93. static void flash_get_offsets (ulong base, flash_info_t *info)
  94. {
  95. int i;
  96. if (info->flash_id == FLASH_UNKNOWN) {
  97. return;
  98. }
  99. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  100. for (i = 0; i < info->sector_count; i++) {
  101. info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
  102. info->protect[i] = 0;
  103. }
  104. }
  105. }
  106. /*-----------------------------------------------------------------------
  107. */
  108. void flash_print_info (flash_info_t *info)
  109. {
  110. int i;
  111. if (info->flash_id == FLASH_UNKNOWN) {
  112. printf ("missing or unknown FLASH type\n");
  113. return;
  114. }
  115. switch (info->flash_id & FLASH_VENDMASK) {
  116. case FLASH_MAN_INTEL:
  117. printf ("INTEL ");
  118. break;
  119. default:
  120. printf ("Unknown Vendor ");
  121. break;
  122. }
  123. switch (info->flash_id & FLASH_TYPEMASK) {
  124. case FLASH_28F640J3A:
  125. printf ("28F640J3A\n");
  126. break;
  127. case FLASH_28F128J3A:
  128. printf ("28F128J3A\n");
  129. break;
  130. default:
  131. printf ("Unknown Chip Type\n");
  132. break;
  133. }
  134. printf (" Size: %ld MB in %d Sectors\n",
  135. info->size >> 20, info->sector_count);
  136. printf (" Sector Start Addresses:");
  137. for (i = 0; i < info->sector_count; ++i) {
  138. if ((i % 5) == 0)
  139. printf ("\n ");
  140. printf (" %08lX%s",
  141. info->start[i],
  142. info->protect[i] ? " (RO)" : " ");
  143. }
  144. printf ("\n");
  145. return;
  146. }
  147. /*
  148. * The following code cannot be run from FLASH!
  149. */
  150. static ulong flash_get_size (FPW *addr, flash_info_t *info)
  151. {
  152. volatile FPW value;
  153. /* Write auto select command: read Manufacturer ID */
  154. addr[0x5555] = (FPW) 0x00AA00AA;
  155. addr[0x2AAA] = (FPW) 0x00550055;
  156. addr[0x5555] = (FPW) 0x00900090;
  157. mb ();
  158. value = addr[0];
  159. switch (value) {
  160. case (FPW) INTEL_MANUFACT:
  161. info->flash_id = FLASH_MAN_INTEL;
  162. break;
  163. default:
  164. info->flash_id = FLASH_UNKNOWN;
  165. info->sector_count = 0;
  166. info->size = 0;
  167. addr[0] = (FPW) INTEL_RESET; /* restore read mode */
  168. return (0); /* no or unknown flash */
  169. }
  170. mb ();
  171. value = addr[1]; /* device ID */
  172. switch (value) {
  173. case (FPW) INTEL_ID_28F640J3A:
  174. info->flash_id += FLASH_28F640J3A;
  175. info->sector_count = 64;
  176. info->size = 0x00800000;
  177. break; /* => 8 MB */
  178. case (FPW) INTEL_ID_28F128J3A:
  179. info->flash_id += FLASH_28F128J3A;
  180. info->sector_count = 128;
  181. info->size = 0x01000000;
  182. break; /* => 16 MB */
  183. default:
  184. info->flash_id = FLASH_UNKNOWN;
  185. break;
  186. }
  187. if (info->sector_count > CFG_MAX_FLASH_SECT) {
  188. printf ("** ERROR: sector count %d > max (%d) **\n",
  189. info->sector_count, CFG_MAX_FLASH_SECT);
  190. info->sector_count = CFG_MAX_FLASH_SECT;
  191. }
  192. addr[0] = (FPW) INTEL_RESET; /* restore read mode */
  193. return (info->size);
  194. }
  195. /*-----------------------------------------------------------------------
  196. */
  197. int flash_erase (flash_info_t *info, int s_first, int s_last)
  198. {
  199. int flag, prot, sect;
  200. ulong type, start, last;
  201. int rcode = 0;
  202. int cflag, iflag;
  203. if ((s_first < 0) || (s_first > s_last)) {
  204. if (info->flash_id == FLASH_UNKNOWN) {
  205. printf ("- missing\n");
  206. } else {
  207. printf ("- no sectors to erase\n");
  208. }
  209. return 1;
  210. }
  211. type = (info->flash_id & FLASH_VENDMASK);
  212. if ((type != FLASH_MAN_INTEL)) {
  213. printf ("Can't erase unknown flash type %08lx - aborted\n",
  214. info->flash_id);
  215. return 1;
  216. }
  217. prot = 0;
  218. for (sect = s_first; sect <= s_last; ++sect) {
  219. if (info->protect[sect]) {
  220. prot++;
  221. }
  222. }
  223. if (prot) {
  224. printf ("- Warning: %d protected sectors will not be erased!\n",
  225. prot);
  226. } else {
  227. printf ("\n");
  228. }
  229. start = get_timer (0);
  230. last = start;
  231. /*
  232. * Disable interrupts which might cause a timeout
  233. * here. Remember that our exception vectors are
  234. * at address 0 in the flash, and we don't want a
  235. * (ticker) exception to happen while the flash
  236. * chip is in programming mode.
  237. */
  238. cflag = icache_status ();
  239. icache_disable ();
  240. iflag = disable_interrupts ();
  241. /* Disable interrupts which might cause a timeout here */
  242. /* flag = disable_interrupts (); */
  243. /* Start erase on unprotected sectors */
  244. for (sect = s_first; sect <= s_last; sect++) {
  245. if (info->protect[sect] == 0) { /* not protected */
  246. FPWV *addr = (FPWV *) (info->start[sect]);
  247. FPW status;
  248. printf ("Erasing sector %2d ... ", sect);
  249. /* arm simple, non interrupt dependent timer */
  250. reset_timer_masked ();
  251. *addr = (FPW) INTEL_CLEAR; /* clear status register */
  252. *addr = (FPW) INTEL_ERASE; /* erase setup */
  253. *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
  254. while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  255. if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
  256. printf ("Timeout\n");
  257. *addr = (FPW) INTEL_SUSPEND; /* suspend erase */
  258. *addr = (FPW) INTEL_RESET; /* reset to read mode */
  259. rcode = 1;
  260. break;
  261. }
  262. }
  263. *addr = INTEL_CLEAR; /* clear status register cmd. */
  264. *addr = INTEL_RESET; /* resest to read mode */
  265. printf (" done\n");
  266. }
  267. }
  268. if (iflag)
  269. enable_interrupts ();
  270. if (cflag)
  271. icache_enable ();
  272. return rcode;
  273. }
  274. /*-----------------------------------------------------------------------
  275. * Copy memory to flash, returns:
  276. * 0 - OK
  277. * 1 - write timeout
  278. * 2 - Flash not erased
  279. * 4 - Flash not identified
  280. */
  281. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  282. {
  283. ulong cp, wp;
  284. FPW data;
  285. int count, i, l, rc, port_width;
  286. if (info->flash_id == FLASH_UNKNOWN) {
  287. return 4;
  288. }
  289. /* get lower word aligned address */
  290. wp = (addr & ~1);
  291. port_width = 2;
  292. /*
  293. * handle unaligned start bytes
  294. */
  295. if ((l = addr - wp) != 0) {
  296. data = 0;
  297. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  298. data = (data << 8) | (*(uchar *) cp);
  299. }
  300. for (; i < port_width && cnt > 0; ++i) {
  301. data = (data << 8) | *src++;
  302. --cnt;
  303. ++cp;
  304. }
  305. for (; cnt == 0 && i < port_width; ++i, ++cp) {
  306. data = (data << 8) | (*(uchar *) cp);
  307. }
  308. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  309. return (rc);
  310. }
  311. wp += port_width;
  312. }
  313. /*
  314. * handle word aligned part
  315. */
  316. count = 0;
  317. while (cnt >= port_width) {
  318. data = 0;
  319. for (i = 0; i < port_width; ++i) {
  320. data = (data << 8) | *src++;
  321. }
  322. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  323. return (rc);
  324. }
  325. wp += port_width;
  326. cnt -= port_width;
  327. if (count++ > 0x800) {
  328. spin_wheel ();
  329. count = 0;
  330. }
  331. }
  332. if (cnt == 0) {
  333. return (0);
  334. }
  335. /*
  336. * handle unaligned tail bytes
  337. */
  338. data = 0;
  339. for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
  340. data = (data << 8) | *src++;
  341. --cnt;
  342. }
  343. for (; i < port_width; ++i, ++cp) {
  344. data = (data << 8) | (*(uchar *) cp);
  345. }
  346. return (write_data (info, wp, SWAP (data)));
  347. }
  348. /*-----------------------------------------------------------------------
  349. * Write a word or halfword to Flash, returns:
  350. * 0 - OK
  351. * 1 - write timeout
  352. * 2 - Flash not erased
  353. */
  354. static int write_data (flash_info_t *info, ulong dest, FPW data)
  355. {
  356. FPWV *addr = (FPWV *) dest;
  357. ulong status;
  358. int cflag, iflag;
  359. int flag;
  360. /* Check if Flash is (sufficiently) erased */
  361. if ((*addr & data) != data) {
  362. printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
  363. return (2);
  364. }
  365. /*
  366. * Disable interrupts which might cause a timeout
  367. * here. Remember that our exception vectors are
  368. * at address 0 in the flash, and we don't want a
  369. * (ticker) exception to happen while the flash
  370. * chip is in programming mode.
  371. */
  372. cflag = icache_status ();
  373. icache_disable ();
  374. iflag = disable_interrupts ();
  375. /* Disable interrupts which might cause a timeout here */
  376. /*flag = disable_interrupts (); */
  377. *addr = (FPW) INTEL_PROG; /* write setup */
  378. *addr = data;
  379. /* arm simple, non interrupt dependent timer */
  380. reset_timer_masked ();
  381. /* wait while polling the status register */
  382. while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  383. if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
  384. *addr = (FPW) INTEL_RESET; /* restore read mode */
  385. return (1);
  386. }
  387. }
  388. *addr = (FPW) INTEL_RESET; /* restore read mode */
  389. if (iflag)
  390. enable_interrupts ();
  391. if (cflag)
  392. icache_enable ();
  393. return (0);
  394. }
  395. void inline spin_wheel (void)
  396. {
  397. static int p = 0;
  398. static char w[] = "\\/-";
  399. printf ("\010%c", w[p]);
  400. (++p == 3) ? (p = 0) : 0;
  401. }
  402. /*-----------------------------------------------------------------------
  403. * Set/Clear sector's lock bit, returns:
  404. * 0 - OK
  405. * 1 - Error (timeout, voltage problems, etc.)
  406. */
  407. int flash_real_protect(flash_info_t *info, long sector, int prot)
  408. {
  409. int i;
  410. int rc = 0;
  411. FPWV *addr = (FPWV *)(info->start[sector]);
  412. int flag = disable_interrupts();
  413. *addr = (FPW) INTEL_CLEAR; /* Clear status register */
  414. if (prot) { /* Set sector lock bit */
  415. *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
  416. *addr = (FPW) INTEL_PROTECT; /* set */
  417. }
  418. else { /* Clear sector lock bit */
  419. *addr = (FPW) INTEL_LOCKBIT; /* All sectors lock bits */
  420. *addr = (FPW) INTEL_CONFIRM; /* clear */
  421. }
  422. reset_timer_masked ();
  423. while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  424. if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) {
  425. printf("Flash lock bit operation timed out\n");
  426. rc = 1;
  427. break;
  428. }
  429. }
  430. if (*addr != (FPW) INTEL_OK) {
  431. printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
  432. (uint)addr, (uint)*addr);
  433. rc = 1;
  434. }
  435. if (!rc)
  436. info->protect[sector] = prot;
  437. /*
  438. * Clear lock bit command clears all sectors lock bits, so
  439. * we have to restore lock bits of protected sectors.
  440. */
  441. if (!prot)
  442. {
  443. for (i = 0; i < info->sector_count; i++)
  444. {
  445. if (info->protect[i])
  446. {
  447. reset_timer_masked ();
  448. addr = (FPWV *) (info->start[i]);
  449. *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
  450. *addr = (FPW) INTEL_PROTECT; /* set */
  451. while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED)
  452. {
  453. if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT)
  454. {
  455. printf("Flash lock bit operation timed out\n");
  456. rc = 1;
  457. break;
  458. }
  459. }
  460. }
  461. }
  462. }
  463. if (flag)
  464. enable_interrupts();
  465. *addr = (FPW) INTEL_RESET; /* Reset to read array mode */
  466. return rc;
  467. }