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- /*
- * U-boot - main board file
- *
- * Copyright (c) 2005-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
- #include <common.h>
- #include <config.h>
- #include <command.h>
- #include <asm/blackfin.h>
- DECLARE_GLOBAL_DATA_PTR;
- int checkboard(void)
- {
- printf("Board: ADI BF548 EZ-Kit board\n");
- printf(" Support: http://blackfin.uclinux.org/\n");
- return 0;
- }
- phys_size_t initdram(int board_type)
- {
- gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
- gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
- return gd->bd->bi_memsize;
- }
- int board_early_init_f(void)
- {
- /* Port H: PH8 - PH13 == A4 - A9
- * address lines of the parallel asynchronous memory interface
- */
- /************************************************
- * configure GPIO *
- * set port H function enable register *
- * configure PH8-PH13 as peripheral (not GPIO) *
- *************************************************/
- bfin_write_PORTH_FER(0x3F03);
- /************************************************
- * set port H MUX to configure PH8-PH13 *
- * 1st Function (MUX = 00) (bits 16-27 == 0) *
- * Set to address signals A4-A9 *
- *************************************************/
- bfin_write_PORTH_MUX(0);
- /************************************************
- * set port H direction register *
- * enable PH8-PH13 as outputs *
- *************************************************/
- bfin_write_PORTH_DIR_SET(0x3F00);
- /* Port I: PI0 - PH14 == A10 - A24
- * address lines of the parallel asynchronous memory interface
- */
- /************************************************
- * set port I function enable register *
- * configure PI0-PI14 as peripheral (not GPIO) *
- *************************************************/
- bfin_write_PORTI_FER(0x7fff);
- /**************************************************
- * set PORT I MUX to configure PI14-PI0 as *
- * 1st Function (MUX=00) - address signals A10-A24 *
- ***************************************************/
- bfin_write_PORTI_MUX(0);
- /****************************************
- * set PORT I direction register *
- * enable PI0 - PI14 as outputs *
- *****************************************/
- bfin_write_PORTI_DIR_SET(0x7fff);
- return 0;
- }
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