bf548-ezkit.c 2.1 KB

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  1. /*
  2. * U-boot - main board file
  3. *
  4. * Copyright (c) 2005-2008 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <common.h>
  9. #include <config.h>
  10. #include <command.h>
  11. #include <asm/blackfin.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. int checkboard(void)
  14. {
  15. printf("Board: ADI BF548 EZ-Kit board\n");
  16. printf(" Support: http://blackfin.uclinux.org/\n");
  17. return 0;
  18. }
  19. phys_size_t initdram(int board_type)
  20. {
  21. gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
  22. gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
  23. return gd->bd->bi_memsize;
  24. }
  25. int board_early_init_f(void)
  26. {
  27. /* Port H: PH8 - PH13 == A4 - A9
  28. * address lines of the parallel asynchronous memory interface
  29. */
  30. /************************************************
  31. * configure GPIO *
  32. * set port H function enable register *
  33. * configure PH8-PH13 as peripheral (not GPIO) *
  34. *************************************************/
  35. bfin_write_PORTH_FER(0x3F03);
  36. /************************************************
  37. * set port H MUX to configure PH8-PH13 *
  38. * 1st Function (MUX = 00) (bits 16-27 == 0) *
  39. * Set to address signals A4-A9 *
  40. *************************************************/
  41. bfin_write_PORTH_MUX(0);
  42. /************************************************
  43. * set port H direction register *
  44. * enable PH8-PH13 as outputs *
  45. *************************************************/
  46. bfin_write_PORTH_DIR_SET(0x3F00);
  47. /* Port I: PI0 - PH14 == A10 - A24
  48. * address lines of the parallel asynchronous memory interface
  49. */
  50. /************************************************
  51. * set port I function enable register *
  52. * configure PI0-PI14 as peripheral (not GPIO) *
  53. *************************************************/
  54. bfin_write_PORTI_FER(0x7fff);
  55. /**************************************************
  56. * set PORT I MUX to configure PI14-PI0 as *
  57. * 1st Function (MUX=00) - address signals A10-A24 *
  58. ***************************************************/
  59. bfin_write_PORTI_MUX(0);
  60. /****************************************
  61. * set PORT I direction register *
  62. * enable PI0 - PI14 as outputs *
  63. *****************************************/
  64. bfin_write_PORTI_DIR_SET(0x7fff);
  65. return 0;
  66. }