yellowstone.h 12 KB

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  1. /*
  2. * (C) Copyright 2005
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /************************************************************************
  24. * yellowstone.h - configuration for YELLOWSTONE board
  25. ***********************************************************************/
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*-----------------------------------------------------------------------
  29. * High Level Configuration Options
  30. *----------------------------------------------------------------------*/
  31. #define CONFIG_YOLLOWSTONE 1 /* Board is Yellowstone */
  32. #define CONFIG_440GR 1 /* Specific PPC440EP support */
  33. #define CONFIG_4xx 1 /* ... PPC4xx family */
  34. #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
  35. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  36. #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
  37. /*-----------------------------------------------------------------------
  38. * Base addresses -- Note these are effective addresses where the
  39. * actual resources get mapped (not physical addresses)
  40. *----------------------------------------------------------------------*/
  41. #define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
  42. #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
  43. #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
  44. #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
  45. #define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
  46. #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
  47. #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
  48. #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
  49. #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
  50. /*Don't change either of these*/
  51. #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
  52. #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
  53. /*Don't change either of these*/
  54. #define CFG_USB_DEVICE 0x50000000
  55. #define CFG_NVRAM_BASE_ADDR 0x80000000
  56. #define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
  57. #define CFG_BOOT_BASE_ADDR 0xf0000000
  58. /*-----------------------------------------------------------------------
  59. * Initial RAM & stack pointer (placed in SDRAM)
  60. *----------------------------------------------------------------------*/
  61. #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
  62. #define CFG_INIT_RAM_END (8 << 10)
  63. #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
  64. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  65. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  66. /*-----------------------------------------------------------------------
  67. * Serial Port
  68. *----------------------------------------------------------------------*/
  69. #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
  70. #define CONFIG_BAUDRATE 115200
  71. #define CONFIG_SERIAL_MULTI 1
  72. /*define this if you want console on UART1*/
  73. #undef CONFIG_UART1_CONSOLE
  74. #define CFG_BAUDRATE_TABLE \
  75. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  76. /*-----------------------------------------------------------------------
  77. * Environment
  78. *----------------------------------------------------------------------*/
  79. /*
  80. * Define here the location of the environment variables (FLASH or EEPROM).
  81. * Note: DENX encourages to use redundant environment in FLASH.
  82. */
  83. #if 1
  84. #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  85. #else
  86. #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
  87. #endif
  88. /*-----------------------------------------------------------------------
  89. * FLASH related
  90. *----------------------------------------------------------------------*/
  91. #define CFG_FLASH_CFI /* The flash is CFI compatible */
  92. #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
  93. #define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
  94. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  95. #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
  96. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  97. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  98. #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  99. #ifdef CFG_ENV_IS_IN_FLASH
  100. #define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
  101. #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
  102. #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
  103. /* Address and size of Redundant Environment Sector */
  104. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
  105. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  106. #endif /* CFG_ENV_IS_IN_FLASH */
  107. /*-----------------------------------------------------------------------
  108. * DDR SDRAM
  109. *----------------------------------------------------------------------*/
  110. #undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
  111. #define CFG_KBYTES_SDRAM (128 * 1024) /* 128MB */
  112. #define CFG_SDRAM_BANKS (2)
  113. /*-----------------------------------------------------------------------
  114. * I2C
  115. *----------------------------------------------------------------------*/
  116. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  117. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  118. #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
  119. #define CFG_I2C_SLAVE 0x7F
  120. #define CFG_I2C_MULTI_EEPROMS
  121. #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
  122. #define CFG_I2C_EEPROM_ADDR_LEN 1
  123. #define CFG_EEPROM_PAGE_WRITE_ENABLE
  124. #define CFG_EEPROM_PAGE_WRITE_BITS 3
  125. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
  126. #ifdef CFG_ENV_IS_IN_EEPROM
  127. #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
  128. #define CFG_ENV_OFFSET 0x0
  129. #endif /* CFG_ENV_IS_IN_EEPROM */
  130. #define CONFIG_PREBOOT "echo;" \
  131. "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
  132. "echo"
  133. #undef CONFIG_BOOTARGS
  134. #define CONFIG_EXTRA_ENV_SETTINGS \
  135. "netdev=eth0\0" \
  136. "hostname=yellowstone\0" \
  137. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  138. "nfsroot=$(serverip):$(rootpath)\0" \
  139. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  140. "addip=setenv bootargs $(bootargs) " \
  141. "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
  142. ":$(hostname):$(netdev):off panic=1\0" \
  143. "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
  144. "flash_nfs=run nfsargs addip addtty;" \
  145. "bootm $(kernel_addr)\0" \
  146. "flash_self=run ramargs addip addtty;" \
  147. "bootm $(kernel_addr) $(ramdisk_addr)\0" \
  148. "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
  149. "bootm\0" \
  150. "rootpath=/opt/eldk/ppc_4xx\0" \
  151. "bootfile=/tftpboot/yellowstone/uImage\0" \
  152. "kernel_addr=fc000000\0" \
  153. "ramdisk_addr=fc100000\0" \
  154. "load=tftp 100000 /tftpboot/yellowstone/u-boot.bin\0" \
  155. "update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
  156. "cp.b 100000 fff80000 80000;" \
  157. "setenv filesize;saveenv\0" \
  158. "upd=run load;run update\0" \
  159. ""
  160. #define CONFIG_BOOTCOMMAND "run flash_self"
  161. #if 0
  162. #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
  163. #else
  164. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  165. #endif
  166. #define CONFIG_BAUDRATE 115200
  167. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  168. #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  169. #define CONFIG_MII 1 /* MII PHY management */
  170. #define CONFIG_NET_MULTI 1 /* required for netconsole */
  171. #define CONFIG_PHY1_ADDR 3
  172. #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
  173. #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
  174. #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  175. /* Partitions */
  176. #define CONFIG_MAC_PARTITION
  177. #define CONFIG_DOS_PARTITION
  178. #define CONFIG_ISO_PARTITION
  179. #ifdef CONFIG_440EP
  180. /* USB */
  181. #define CONFIG_USB_OHCI
  182. #define CONFIG_USB_STORAGE
  183. /*Comment this out to enable USB 1.1 device*/
  184. #define USB_2_0_DEVICE
  185. #endif /*CONFIG_440EP*/
  186. #ifdef DEBUG
  187. #define CONFIG_PANIC_HANG
  188. #else
  189. #define CONFIG_HW_WATCHDOG /* watchdog */
  190. #endif
  191. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
  192. CFG_CMD_ASKENV | \
  193. CFG_CMD_DHCP | \
  194. CFG_CMD_DIAG | \
  195. CFG_CMD_ELF | \
  196. CFG_CMD_I2C | \
  197. CFG_CMD_IRQ | \
  198. CFG_CMD_MII | \
  199. CFG_CMD_NET | \
  200. CFG_CMD_NFS | \
  201. CFG_CMD_PCI | \
  202. CFG_CMD_PING | \
  203. CFG_CMD_REGINFO | \
  204. CFG_CMD_SDRAM)
  205. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  206. #include <cmd_confdefs.h>
  207. /*
  208. * Miscellaneous configurable options
  209. */
  210. #define CFG_LONGHELP /* undef to save memory */
  211. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  212. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  213. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  214. #else
  215. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  216. #endif
  217. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  218. #define CFG_MAXARGS 16 /* max number of command args */
  219. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  220. #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
  221. #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
  222. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  223. #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  224. #define CONFIG_LYNXKDI 1 /* support kdi files */
  225. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  226. /*-----------------------------------------------------------------------
  227. * PCI stuff
  228. *-----------------------------------------------------------------------
  229. */
  230. /* General PCI */
  231. #define CONFIG_PCI /* include pci support */
  232. #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
  233. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  234. #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
  235. /* Board-specific PCI */
  236. #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
  237. #define CFG_PCI_TARGET_INIT
  238. #define CFG_PCI_MASTER_INIT
  239. #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
  240. #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
  241. /*
  242. * For booting Linux, the board info and command line data
  243. * have to be in the first 8 MB of memory, since this is
  244. * the maximum mapped by the Linux kernel during initialization.
  245. */
  246. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  247. /*-----------------------------------------------------------------------
  248. * Cache Configuration
  249. */
  250. #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
  251. #define CFG_CACHELINE_SIZE 32 /* ... */
  252. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  253. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  254. #endif
  255. /*
  256. * Internal Definitions
  257. *
  258. * Boot Flags
  259. */
  260. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  261. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  262. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  263. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  264. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  265. #endif
  266. #endif /* __CONFIG_H */