cpu.c 3.1 KB

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  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <watchdog.h>
  29. #include <command.h>
  30. #include <netdev.h>
  31. #include <asm/immap.h>
  32. DECLARE_GLOBAL_DATA_PTR;
  33. int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  34. {
  35. volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  36. udelay(1000);
  37. rcm->rcr |= RCM_RCR_SOFTRST;
  38. /* we don't return! */
  39. return 0;
  40. };
  41. int checkcpu(void)
  42. {
  43. volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
  44. u16 msk;
  45. u16 id = 0;
  46. u8 ver;
  47. puts("CPU: ");
  48. msk = (ccm->cir >> 6);
  49. ver = (ccm->cir & 0x003f);
  50. switch (msk) {
  51. case 0x54:
  52. id = 5329;
  53. break;
  54. case 0x59:
  55. id = 5328;
  56. break;
  57. case 0x61:
  58. id = 5327;
  59. break;
  60. case 0x65:
  61. id = 5373;
  62. break;
  63. case 0x68:
  64. id = 53721;
  65. break;
  66. case 0x69:
  67. id = 5372;
  68. break;
  69. case 0x6B:
  70. id = 5372;
  71. break;
  72. }
  73. if (id) {
  74. char buf1[32], buf2[32];
  75. printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  76. ver);
  77. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  78. strmhz(buf1, gd->cpu_clk)),
  79. strmhz(buf2, gd->bus_clk)));
  80. }
  81. return 0;
  82. };
  83. #if defined(CONFIG_WATCHDOG)
  84. /* Called by macro WATCHDOG_RESET */
  85. void watchdog_reset(void)
  86. {
  87. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  88. wdp->sr = 0x5555; /* Count register */
  89. wdp->sr = 0xAAAA; /* Count register */
  90. }
  91. int watchdog_disable(void)
  92. {
  93. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  94. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  95. wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
  96. puts("WATCHDOG:disabled\n");
  97. return (0);
  98. }
  99. int watchdog_init(void)
  100. {
  101. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  102. u32 wdog_module = 0;
  103. /* set timeout and enable watchdog */
  104. wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
  105. #ifdef CONFIG_M5329
  106. wdp->mr = (wdog_module / 8192);
  107. #else
  108. wdp->mr = (wdog_module / 4096);
  109. #endif
  110. wdp->cr = WTM_WCR_EN;
  111. puts("WATCHDOG:enabled\n");
  112. return (0);
  113. }
  114. #endif /* CONFIG_WATCHDOG */
  115. #if defined(CONFIG_MCFFEC)
  116. /* Default initializations for MCFFEC controllers. To override,
  117. * create a board-specific function called:
  118. * int board_eth_init(bd_t *bis)
  119. */
  120. int cpu_eth_init(bd_t *bis)
  121. {
  122. return mcffec_initialize(bis);
  123. }
  124. #endif