flash.c 10 KB

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  1. /*
  2. * (C) Copyright 2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  25. /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
  26. * has nothing to do with the flash chip being 8-bit or 16-bit.
  27. */
  28. #ifdef CONFIG_FLASH_16BIT
  29. typedef unsigned short FLASH_PORT_WIDTH;
  30. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  31. #define FLASH_ID_MASK 0xFFFF
  32. #else
  33. typedef unsigned char FLASH_PORT_WIDTH;
  34. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  35. #define FLASH_ID_MASK 0xFF
  36. #endif
  37. #define FPW FLASH_PORT_WIDTH
  38. #define FPWV FLASH_PORT_WIDTHV
  39. #define ORMASK(size) ((-size) & OR_AM_MSK)
  40. #define FLASH_CYCLE1 0x0555
  41. #define FLASH_CYCLE2 0x02aa
  42. /*-----------------------------------------------------------------------
  43. * Functions
  44. */
  45. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  46. static void flash_reset(flash_info_t *info);
  47. static flash_info_t *flash_get_info(ulong base);
  48. static int write_data (flash_info_t *info, FPWV *dest, FPW data); /* O2D */
  49. /*-----------------------------------------------------------------------
  50. * flash_init()
  51. *
  52. * sets up flash_info and returns size of FLASH (bytes)
  53. */
  54. unsigned long flash_init (void)
  55. {
  56. unsigned long size = 0;
  57. int i;
  58. extern void flash_preinit(void);
  59. extern void flash_afterinit(ulong);
  60. flash_preinit();
  61. /* Init: no FLASHes known */
  62. for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
  63. memset(&flash_info[i], 0, sizeof(flash_info_t));
  64. flash_info[i].flash_id = FLASH_UNKNOWN;
  65. }
  66. /* Query flash chip */
  67. flash_info[0].size =
  68. flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
  69. size += flash_info[0].size;
  70. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  71. /* monitor protection ON by default */
  72. flash_protect(FLAG_PROTECT_SET,
  73. CFG_MONITOR_BASE,
  74. CFG_MONITOR_BASE+monitor_flash_len-1,
  75. flash_get_info(CFG_MONITOR_BASE));
  76. #endif
  77. #ifdef CFG_ENV_IS_IN_FLASH
  78. /* ENV protection ON by default */
  79. flash_protect(FLAG_PROTECT_SET,
  80. CFG_ENV_ADDR,
  81. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  82. flash_get_info(CFG_ENV_ADDR));
  83. #endif
  84. flash_afterinit(size);
  85. return (size ? size : 1);
  86. }
  87. /*-----------------------------------------------------------------------
  88. */
  89. static void flash_reset(flash_info_t *info)
  90. {
  91. FPWV *base = (FPWV *)(info->start[0]);
  92. /* Put FLASH back in read mode */
  93. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  94. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  95. }
  96. /*-----------------------------------------------------------------------
  97. */
  98. static flash_info_t *flash_get_info(ulong base)
  99. {
  100. int i;
  101. flash_info_t * info;
  102. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  103. info = & flash_info[i];
  104. if (info->size &&
  105. info->start[0] <= base &&
  106. base <= info->start[0] + info->size - 1)
  107. break;
  108. }
  109. return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
  110. }
  111. /*-----------------------------------------------------------------------
  112. */
  113. void flash_print_info (flash_info_t *info)
  114. {
  115. int i;
  116. uchar *boottype;
  117. uchar *bootletter;
  118. uchar *fmt;
  119. uchar botbootletter[] = "B";
  120. uchar topbootletter[] = "T";
  121. uchar botboottype[] = "bottom boot sector";
  122. uchar topboottype[] = "top boot sector";
  123. if (info->flash_id == FLASH_UNKNOWN) {
  124. printf ("missing or unknown FLASH type\n");
  125. return;
  126. }
  127. switch (info->flash_id & FLASH_VENDMASK) {
  128. case FLASH_MAN_INTEL:
  129. printf ("INTEL ");
  130. break;
  131. default:
  132. printf ("Unknown Vendor ");
  133. break;
  134. }
  135. /* check for top or bottom boot, if it applies */
  136. if (info->flash_id & FLASH_BTYPE) {
  137. boottype = botboottype;
  138. bootletter = botbootletter;
  139. } else {
  140. boottype = topboottype;
  141. bootletter = topbootletter;
  142. }
  143. switch (info->flash_id & FLASH_TYPEMASK) {
  144. case FLASH_28F128J3A:
  145. fmt = "28F128J3 (128 Mbit, uniform sectors)\n";
  146. break;
  147. default:
  148. fmt = "Unknown Chip Type\n";
  149. break;
  150. }
  151. printf (fmt, bootletter, boottype);
  152. printf (" Size: %ld MB in %d Sectors\n",
  153. info->size >> 20,
  154. info->sector_count);
  155. printf (" Sector Start Addresses:");
  156. for (i=0; i<info->sector_count; ++i) {
  157. if ((i % 5) == 0)
  158. printf ("\n ");
  159. printf (" %08lX%s", info->start[i],
  160. info->protect[i] ? " (RO)" : " ");
  161. }
  162. printf ("\n");
  163. }
  164. /*-----------------------------------------------------------------------
  165. */
  166. /*
  167. * The following code cannot be run from FLASH!
  168. */
  169. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  170. {
  171. int i;
  172. /* Write auto select command: read Manufacturer ID */
  173. /* Write auto select command sequence and test FLASH answer */
  174. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  175. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  176. * This works for any bus width and any FLASH device width.
  177. */
  178. udelay(100);
  179. switch (addr[0] & 0xff) {
  180. case (uchar)INTEL_MANUFACT:
  181. info->flash_id = FLASH_MAN_INTEL;
  182. break;
  183. default:
  184. info->flash_id = FLASH_UNKNOWN;
  185. info->sector_count = 0;
  186. info->size = 0;
  187. break;
  188. }
  189. /* Strataflash is configurable to 8/16bit Bus,
  190. * but the Query-Structure is Word-orientated */
  191. if (info->flash_id != FLASH_UNKNOWN) {
  192. switch ((FPW)addr[2]) {
  193. case (FPW)INTEL_ID_28F128J3:
  194. info->flash_id += FLASH_28F128J3A;
  195. info->sector_count = 128;
  196. info->size = 0x01000000;
  197. for( i = 0; i < info->sector_count; i++ )
  198. info->start[i] = (ulong)addr + (i * 0x20000);
  199. break; /* => Intel Strataflash 16MB */
  200. default:
  201. printf("Flash_id != %xd\n", (FPW)addr[2]);
  202. info->flash_id = FLASH_UNKNOWN;
  203. info->sector_count = 0;
  204. info->size = 0;
  205. return (0); /* => no or unknown flash */
  206. }
  207. }
  208. /* Put FLASH back in read mode */
  209. flash_reset(info);
  210. return (info->size);
  211. }
  212. /*-----------------------------------------------------------------------
  213. */
  214. int flash_erase (flash_info_t *info, int s_first, int s_last)
  215. {
  216. FPWV *addr;
  217. int flag, prot, sect;
  218. ulong start, now, last;
  219. int rcode = 0;
  220. if ((s_first < 0) || (s_first > s_last)) {
  221. if (info->flash_id == FLASH_UNKNOWN) {
  222. printf ("- missing\n");
  223. } else {
  224. printf ("- no sectors to erase\n");
  225. }
  226. return 1;
  227. }
  228. switch (info->flash_id & FLASH_TYPEMASK) {
  229. case FLASH_28F128J3A:
  230. break;
  231. case FLASH_UNKNOWN:
  232. default:
  233. printf ("Can't erase unknown flash type %08lx - aborted\n",
  234. info->flash_id);
  235. return 1;
  236. }
  237. prot = 0;
  238. for (sect = s_first; sect <= s_last; ++sect)
  239. if (info->protect[sect])
  240. prot++;
  241. if (prot)
  242. printf ("- Warning: %d protected sectors will not be erased!",
  243. prot);
  244. printf ("\n");
  245. last = get_timer(0);
  246. /* Start erase on unprotected sectors */
  247. for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
  248. if (info->protect[sect] != 0) /* protected, skip it */
  249. continue;
  250. /* Disable interrupts which might cause a timeout here */
  251. flag = disable_interrupts();
  252. addr = (FPWV *)(info->start[sect]);
  253. *addr = (FPW)0x00500050; /* clear status register */
  254. *addr = (FPW)0x00200020; /* erase setup */
  255. *addr = (FPW)0x00D000D0; /* erase confirm */
  256. /* re-enable interrupts if necessary */
  257. if (flag)
  258. enable_interrupts();
  259. start = get_timer(0);
  260. /* wait at least 80us for Intel - let's wait 1 ms */
  261. udelay (1000);
  262. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  263. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  264. printf ("Timeout\n");
  265. *addr = (FPW)0x00B000B0;/* suspend erase */
  266. flash_reset(info); /* reset to read mode */
  267. rcode = 1; /* failed */
  268. break;
  269. }
  270. /* show that we're waiting */
  271. if ((get_timer(last)) > CFG_HZ) { /* every second */
  272. putc ('.');
  273. last = get_timer(0);
  274. }
  275. }
  276. flash_reset(info); /* reset to read mode */
  277. }
  278. printf (" done\n");
  279. return rcode;
  280. }
  281. /*-----------------------------------------------------------------------
  282. * Copy memory to flash, returns:
  283. * 0 - OK
  284. * 1 - write timeout
  285. * 2 - Flash not erased
  286. */
  287. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  288. {
  289. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  290. int bytes; /* number of bytes to program in current word */
  291. int left; /* number of bytes left to program */
  292. int i, res;
  293. for (left = cnt, res = 0;
  294. left > 0 && res == 0;
  295. addr += sizeof(data), left -= sizeof(data) - bytes) {
  296. bytes = addr & (sizeof(data) - 1);
  297. addr &= ~(sizeof(data) - 1);
  298. /* combine source and destination data so can program
  299. * an entire word of 16 or 32 bits */
  300. for (i = 0; i < sizeof(data); i++) {
  301. data <<= 8;
  302. if (i < bytes || i - bytes >= left )
  303. data += *((uchar *)addr + i);
  304. else
  305. data += *src++;
  306. }
  307. /* write one word to the flash */
  308. switch (info->flash_id & FLASH_VENDMASK) {
  309. case FLASH_MAN_INTEL:
  310. res = write_data(info, (FPWV *)addr, data);
  311. break;
  312. default:
  313. /* unknown flash type, error! */
  314. printf ("missing or unknown FLASH type\n");
  315. res = 1; /* not really a timeout, but gives error */
  316. break;
  317. }
  318. }
  319. return (res);
  320. }
  321. /*-----------------------------------------------------------------------
  322. * Write a word or halfword to Flash, returns:
  323. * 0 - OK
  324. * 1 - write timeout
  325. * 2 - Flash not erased
  326. */
  327. static int write_data (flash_info_t *info, FPWV *dest, FPW data)
  328. {
  329. FPWV *addr = dest;
  330. ulong status;
  331. ulong start;
  332. int flag;
  333. /* Check if Flash is (sufficiently) erased */
  334. if ((*addr & data) != data) {
  335. printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
  336. return (2);
  337. }
  338. /* Disable interrupts which might cause a timeout here */
  339. flag = disable_interrupts ();
  340. *addr = (FPW) 0x00400040; /* write setup */
  341. *addr = data;
  342. /* arm simple, non interrupt dependent timer */
  343. start = get_timer(0);
  344. /* wait while polling the status register */
  345. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  346. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  347. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  348. return (1);
  349. }
  350. }
  351. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  352. if (flag)
  353. enable_interrupts();
  354. return (0);
  355. }