interrupts.c 4.7 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * DAVE Srl
  4. * http://www.dave-tech.it
  5. * http://www.wawnet.biz
  6. * mailto:info@wawnet.biz
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <asm/hardware.h>
  28. #include <asm/proc-armv/ptrace.h>
  29. extern void reset_cpu(ulong addr);
  30. /* we always count down the max. */
  31. #define TIMER_LOAD_VAL 0xffff
  32. /* macro to read the 16 bit timer */
  33. #define READ_TIMER (TCNTO1 & 0xffff)
  34. #ifdef CONFIG_USE_IRQ
  35. #error CONFIG_USE_IRQ NOT supported
  36. #else
  37. void enable_interrupts (void)
  38. {
  39. return;
  40. }
  41. int disable_interrupts (void)
  42. {
  43. return 0;
  44. }
  45. #endif
  46. void bad_mode (void)
  47. {
  48. panic ("Resetting CPU ...\n");
  49. reset_cpu (0);
  50. }
  51. void show_regs (struct pt_regs *regs)
  52. {
  53. unsigned long flags;
  54. const char *processor_modes[] =
  55. { "USER_26", "FIQ_26", "IRQ_26", "SVC_26", "UK4_26", "UK5_26",
  56. "UK6_26", "UK7_26",
  57. "UK8_26", "UK9_26", "UK10_26", "UK11_26", "UK12_26", "UK13_26",
  58. "UK14_26", "UK15_26",
  59. "USER_32", "FIQ_32", "IRQ_32", "SVC_32", "UK4_32", "UK5_32",
  60. "UK6_32", "ABT_32",
  61. "UK8_32", "UK9_32", "UK10_32", "UND_32", "UK12_32", "UK13_32",
  62. "UK14_32", "SYS_32"
  63. };
  64. flags = condition_codes (regs);
  65. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  66. "sp : %08lx ip : %08lx fp : %08lx\n",
  67. instruction_pointer (regs),
  68. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  69. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  70. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  71. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  72. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  73. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  74. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  75. printf ("Flags: %c%c%c%c",
  76. flags & CC_N_BIT ? 'N' : 'n',
  77. flags & CC_Z_BIT ? 'Z' : 'z',
  78. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  79. printf (" IRQs %s FIQs %s Mode %s%s\n",
  80. interrupts_enabled (regs) ? "on" : "off",
  81. fast_interrupts_enabled (regs) ? "on" : "off",
  82. processor_modes[processor_mode (regs)],
  83. thumb_mode (regs) ? " (T)" : "");
  84. }
  85. void do_undefined_instruction (struct pt_regs *pt_regs)
  86. {
  87. printf ("undefined instruction\n");
  88. show_regs (pt_regs);
  89. bad_mode ();
  90. }
  91. void do_software_interrupt (struct pt_regs *pt_regs)
  92. {
  93. printf ("software interrupt\n");
  94. show_regs (pt_regs);
  95. bad_mode ();
  96. }
  97. void do_prefetch_abort (struct pt_regs *pt_regs)
  98. {
  99. printf ("prefetch abort\n");
  100. show_regs (pt_regs);
  101. bad_mode ();
  102. }
  103. void do_data_abort (struct pt_regs *pt_regs)
  104. {
  105. printf ("data abort\n");
  106. show_regs (pt_regs);
  107. bad_mode ();
  108. }
  109. void do_not_used (struct pt_regs *pt_regs)
  110. {
  111. printf ("not used\n");
  112. show_regs (pt_regs);
  113. bad_mode ();
  114. }
  115. void do_fiq (struct pt_regs *pt_regs)
  116. {
  117. printf ("fast interrupt request\n");
  118. show_regs (pt_regs);
  119. bad_mode ();
  120. }
  121. void do_irq (struct pt_regs *pt_regs)
  122. {
  123. printf ("interrupt request\n");
  124. show_regs (pt_regs);
  125. bad_mode ();
  126. }
  127. static ulong timestamp;
  128. static ulong lastdec;
  129. int interrupt_init (void)
  130. {
  131. TCFG0 = 0x000000E9;
  132. TCFG1 = 0x00000004;
  133. TCON = 0x00000900;
  134. TCNTB1 = TIMER_LOAD_VAL;
  135. TCMPB1 = 0;
  136. TCON = 0x00000B00;
  137. TCON = 0x00000900;
  138. lastdec = TCNTB1 = TIMER_LOAD_VAL;
  139. timestamp = 0;
  140. return 0;
  141. }
  142. /*
  143. * timer without interrupts
  144. */
  145. void reset_timer (void)
  146. {
  147. reset_timer_masked ();
  148. }
  149. ulong get_timer (ulong base)
  150. {
  151. return get_timer_masked () - base;
  152. }
  153. void set_timer (ulong t)
  154. {
  155. timestamp = t;
  156. }
  157. void udelay (unsigned long usec)
  158. {
  159. ulong tmo;
  160. tmo = usec / 1000;
  161. tmo *= CFG_HZ;
  162. tmo /= 8;
  163. tmo += get_timer (0);
  164. while (get_timer_masked () < tmo)
  165. /*NOP*/;
  166. }
  167. void reset_timer_masked (void)
  168. {
  169. /* reset time */
  170. lastdec = READ_TIMER;
  171. timestamp = 0;
  172. }
  173. ulong get_timer_masked (void)
  174. {
  175. ulong now = READ_TIMER;
  176. if (lastdec >= now) {
  177. /* normal mode */
  178. timestamp += lastdec - now;
  179. } else {
  180. /* we have an overflow ... */
  181. timestamp += lastdec + TIMER_LOAD_VAL - now;
  182. }
  183. lastdec = now;
  184. return timestamp;
  185. }
  186. void udelay_masked (unsigned long usec)
  187. {
  188. ulong tmo;
  189. tmo = usec / 1000;
  190. tmo *= CFG_HZ;
  191. tmo /= 8;
  192. tmo += get_timer (0);
  193. reset_timer_masked ();
  194. while (get_timer_masked () < tmo)
  195. /*NOP*/;
  196. }