dram.c 2.4 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Marvell Semiconductor <www.marvell.com>
  4. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #include <config.h>
  25. #include <common.h>
  26. #include <asm/arch/kirkwood.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. #define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08))
  29. #define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
  30. /*
  31. * kw_sdram_bar - reads SDRAM Base Address Register
  32. */
  33. u32 kw_sdram_bar(enum memory_bank bank)
  34. {
  35. u32 result = 0;
  36. u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  37. if ((!enable) || (bank > BANK3))
  38. return 0;
  39. result = readl(KW_REG_CPUCS_WIN_BAR(bank));
  40. return result;
  41. }
  42. /*
  43. * kw_sdram_bs - reads SDRAM Bank size
  44. */
  45. u32 kw_sdram_bs(enum memory_bank bank)
  46. {
  47. u32 result = 0;
  48. u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  49. if ((!enable) || (bank > BANK3))
  50. return 0;
  51. result = 0xff000000 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  52. result += 0x01000000;
  53. return result;
  54. }
  55. #ifndef CONFIG_SYS_BOARD_DRAM_INIT
  56. int dram_init(void)
  57. {
  58. int i;
  59. gd->ram_size = 0;
  60. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  61. gd->bd->bi_dram[i].start = kw_sdram_bar(i);
  62. gd->bd->bi_dram[i].size = kw_sdram_bs(i);
  63. /*
  64. * It is assumed that all memory banks are consecutive
  65. * and without gaps.
  66. * If the gap is found, ram_size will be reported for
  67. * consecutive memory only
  68. */
  69. if (gd->bd->bi_dram[i].start != gd->ram_size)
  70. break;
  71. gd->ram_size += gd->bd->bi_dram[i].size;
  72. }
  73. return 0;
  74. }
  75. /*
  76. * If this function is not defined here,
  77. * board.c alters dram bank zero configuration defined above.
  78. */
  79. void dram_init_banksize(void)
  80. {
  81. dram_init();
  82. }
  83. #endif /* CONFIG_SYS_BOARD_DRAM_INIT */