kgdb.S 1.7 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374
  1. /*
  2. * Copyright (C) 2000 Murray Jensen <Murray.Jensen@cmst.csiro.au>
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <config.h>
  23. #include <command.h>
  24. #include <mpc8xx.h>
  25. #include <version.h>
  26. #define CONFIG_8xx 1 /* needed for Linux kernel header files */
  27. #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
  28. #include <ppc_asm.tmpl>
  29. #include <ppc_defs.h>
  30. #include <asm/cache.h>
  31. #include <asm/mmu.h>
  32. #if defined(CONFIG_CMD_KGDB)
  33. /*
  34. * cache flushing routines for kgdb
  35. */
  36. .globl kgdb_flush_cache_all
  37. kgdb_flush_cache_all:
  38. lis r3, IDC_INVALL@h
  39. mtspr DC_CST, r3
  40. sync
  41. lis r3, IDC_INVALL@h
  42. mtspr IC_CST, r3
  43. SYNC
  44. blr
  45. .globl kgdb_flush_cache_range
  46. kgdb_flush_cache_range:
  47. li r5,CFG_CACHELINE_SIZE-1
  48. andc r3,r3,r5
  49. subf r4,r3,r4
  50. add r4,r4,r5
  51. srwi. r4,r4,CFG_CACHELINE_SHIFT
  52. beqlr
  53. mtctr r4
  54. mr r6,r3
  55. 1: dcbst 0,r3
  56. addi r3,r3,CFG_CACHELINE_SIZE
  57. bdnz 1b
  58. sync /* wait for dcbst's to get to ram */
  59. mtctr r4
  60. 2: icbi 0,r6
  61. addi r6,r6,CFG_CACHELINE_SIZE
  62. bdnz 2b
  63. SYNC
  64. blr
  65. #endif