mcc200.h 8.0 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. /*
  26. * High Level Configuration Options
  27. * (easy to change)
  28. */
  29. #define CONFIG_MPC5200
  30. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  31. #define CONFIG_MCC200 1 /* ... on MCC200 board */
  32. #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
  33. #define CONFIG_MISC_INIT_R
  34. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  35. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  36. #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  37. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  38. # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  39. #endif
  40. /*
  41. * Serial console configuration
  42. */
  43. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  44. #define CONFIG_BAUDRATE 115200
  45. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  46. #define CONFIG_MII 1
  47. #define CONFIG_DOS_PARTITION
  48. /* USB */
  49. #define CONFIG_USB_OHCI
  50. #define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
  51. #define CONFIG_USB_STORAGE
  52. /*
  53. * Supported commands
  54. */
  55. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
  56. ADD_USB_CMD | \
  57. CFG_CMD_BEDBUG | \
  58. CFG_CMD_FAT | \
  59. CFG_CMD_I2C)
  60. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  61. #include <cmd_confdefs.h>
  62. /*
  63. * Autobooting
  64. */
  65. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  66. #define CONFIG_PREBOOT "echo;" \
  67. "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
  68. "echo"
  69. #undef CONFIG_BOOTARGS
  70. #define CONFIG_EXTRA_ENV_SETTINGS \
  71. "netdev=eth0\0" \
  72. "hostname=mcc200\0" \
  73. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  74. "nfsroot=${serverip}:${rootpath}\0" \
  75. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  76. "addip=setenv bootargs ${bootargs} " \
  77. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  78. ":${hostname}:${netdev}:off panic=1\0" \
  79. "flash_nfs=run nfsargs addip;" \
  80. "bootm ${kernel_addr}\0" \
  81. "flash_self=run ramargs addip;" \
  82. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  83. "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
  84. "rootpath=/opt/eldk/ppc_6xx\0" \
  85. "bootfile=/tftpboot/mcc200/uImage\0" \
  86. "baudrate=115200\0" \
  87. "load=tftp 200000 /tftpboot/mcc200/u-boot.bin\0" \
  88. "update=protect off FFF00000 +${filesize};" \
  89. "era FFF00000 +${filesize};" \
  90. "cp.b 200000 FFF00000 ${filesize}\0" \
  91. "serverip=192.168.1.1\0" \
  92. "ipaddr=192.168.133.144\0" \
  93. "netmask=255.255.0.0\0" \
  94. "unlock=yes\0" \
  95. "ethaddr=00:02:44:7D:73:3B\0" \
  96. ""
  97. #define CONFIG_BOOTCOMMAND "run flash_self"
  98. #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
  99. #define CFG_PROMPT_HUSH_PS2 "> "
  100. /*
  101. * IPB Bus clocking configuration.
  102. */
  103. #define CFG_IPBSPEED_133 /* define for 133MHz speed */
  104. /*
  105. * I2C configuration
  106. */
  107. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  108. #define CFG_I2C_MODULE 1 /* Select I2C module #1 or #2 */
  109. #define CFG_I2C_SPEED 100000 /* 100 kHz */
  110. #define CFG_I2C_SLAVE 0x7F
  111. /*
  112. * Flash configuration (8,16 or 32 MB)
  113. * TEXT base always at 0xFFF00000
  114. * ENV_ADDR always at 0xFFF40000
  115. * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
  116. * 0xFE000000 for 32 MB
  117. * 0xFF000000 for 16 MB
  118. * 0xFF800000 for 8 MB
  119. */
  120. #define CFG_FLASH_BASE 0xfc000000
  121. #define CFG_FLASH_SIZE 0x04000000
  122. #define CFG_FLASH_CFI /* The flash is CFI compatible */
  123. #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
  124. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  125. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  126. #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
  127. #define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
  128. #define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
  129. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  130. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  131. #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  132. #define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
  133. #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  134. #define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
  135. #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
  136. #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
  137. /* Address and size of Redundant Environment Sector */
  138. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
  139. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  140. #define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
  141. /*
  142. * Memory map
  143. */
  144. #define CFG_MBAR 0xf0000000
  145. #define CFG_SDRAM_BASE 0x00000000
  146. #define CFG_DEFAULT_MBAR 0x80000000
  147. /* Use SRAM until RAM will be available */
  148. #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
  149. #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
  150. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  151. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  152. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  153. #define CFG_MONITOR_BASE TEXT_BASE
  154. #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
  155. # define CFG_RAMBOOT 1
  156. #endif
  157. #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  158. #define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
  159. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  160. /*
  161. * Ethernet configuration
  162. */
  163. #define CONFIG_MPC5xxx_FEC 1
  164. /*
  165. * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
  166. */
  167. /* #define CONFIG_FEC_10MBIT 1 */
  168. #define CONFIG_PHY_ADDR 1
  169. /*
  170. * GPIO configuration
  171. */
  172. /* 0x10000004 = 32MB SDRAM */
  173. /* 0x90000004 = 64MB SDRAM */
  174. #define CFG_GPS_PORT_CONFIG 0x00000004
  175. /*
  176. * Miscellaneous configurable options
  177. */
  178. #define CFG_LONGHELP /* undef to save memory */
  179. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  180. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  181. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  182. #else
  183. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  184. #endif
  185. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  186. #define CFG_MAXARGS 16 /* max number of command args */
  187. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  188. #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
  189. #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
  190. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  191. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  192. /*
  193. * Various low-level settings
  194. */
  195. #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
  196. #define CFG_HID0_FINAL HID0_ICE
  197. #define CFG_BOOTCS_START CFG_FLASH_BASE
  198. #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
  199. #define CFG_BOOTCS_CFG 0x0004fb00
  200. #define CFG_CS0_START CFG_FLASH_BASE
  201. #define CFG_CS0_SIZE CFG_FLASH_SIZE
  202. /* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
  203. #define CFG_CS2_START 0x80000000
  204. #define CFG_CS2_SIZE 0x00001000
  205. #define CFG_CS2_CFG 0x1d800
  206. #define CFG_CS_BURST 0x00000000
  207. #define CFG_CS_DEADCYCLE 0x33333333
  208. #define CFG_RESET_ADDRESS 0xff000000
  209. /*-----------------------------------------------------------------------
  210. * USB stuff
  211. *-----------------------------------------------------------------------
  212. */
  213. #define CONFIG_USB_CLOCK 0x0001BBBB
  214. #define CONFIG_USB_CONFIG 0x00005000
  215. #endif /* __CONFIG_H */