pci.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
  1. /*
  2. * Copyright 2009-2010 Freescale Semiconductor, Inc.
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <command.h>
  24. #include <pci.h>
  25. #include <asm/immap_85xx.h>
  26. #include <asm/fsl_serdes.h>
  27. #include <asm/io.h>
  28. #include <asm/fsl_pci.h>
  29. #include <libfdt.h>
  30. #include <fdt_support.h>
  31. DECLARE_GLOBAL_DATA_PTR;
  32. #ifdef CONFIG_PCIE1
  33. static struct pci_controller pcie1_hose;
  34. #endif
  35. #ifdef CONFIG_PCIE2
  36. static struct pci_controller pcie2_hose;
  37. #endif
  38. void pci_init_board(void)
  39. {
  40. volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  41. struct fsl_pci_info pci_info[2];
  42. u32 devdisr, pordevsr;
  43. int first_free_busno = 0;
  44. int num = 0;
  45. int pcie_ep, pcie_configured;
  46. devdisr = in_be32(&gur->devdisr);
  47. pordevsr = in_be32(&gur->pordevsr);
  48. puts("\n");
  49. #ifdef CONFIG_PCIE2
  50. pcie_configured = is_serdes_configured(PCIE2);
  51. if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
  52. SET_STD_PCIE_INFO(pci_info[num], 2);
  53. pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
  54. printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
  55. pcie_ep ? "Endpoint" : "Root Complex",
  56. pci_info[num].regs);
  57. first_free_busno = fsl_pci_init_port(&pci_info[num++],
  58. &pcie2_hose, first_free_busno);
  59. } else {
  60. printf("PCIE2: disabled\n");
  61. }
  62. puts("\n");
  63. #else
  64. setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
  65. #endif
  66. #ifdef CONFIG_PCIE1
  67. pcie_configured = is_serdes_configured(PCIE1);
  68. if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
  69. SET_STD_PCIE_INFO(pci_info[num], 1);
  70. pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
  71. printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
  72. pcie_ep ? "Endpoint" : "Root Complex",
  73. pci_info[num].regs);
  74. first_free_busno = fsl_pci_init_port(&pci_info[num++],
  75. &pcie1_hose, first_free_busno);
  76. } else {
  77. printf("PCIE1: disabled\n");
  78. }
  79. puts("\n");
  80. #else
  81. setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
  82. #endif
  83. }
  84. void ft_pci_board_setup(void *blob)
  85. {
  86. FT_FSL_PCI_SETUP;
  87. }