da8xx-usb.h 3.2 KB

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  1. /*
  2. * da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions.
  3. *
  4. * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
  5. *
  6. * Based on drivers/usb/musb/davinci.h
  7. *
  8. * Copyright (C) 2009 Texas Instruments Incorporated
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #ifndef __DA8XX_MUSB_H__
  25. #define __DA8XX_MUSB_H__
  26. #include <asm/arch/hardware.h>
  27. #include <asm/arch/gpio.h>
  28. /* Base address of da8xx usb0 wrapper */
  29. #define DA8XX_USB_OTG_BASE 0x01E00000
  30. /* Base address of da8xx musb core */
  31. #define DA8XX_USB_OTG_CORE_BASE (DA8XX_USB_OTG_BASE + 0x400)
  32. /* Timeout for DA8xx usb module */
  33. #define DA8XX_USB_OTG_TIMEOUT 0x3FFFFFF
  34. /*
  35. * DA8xx platform USB wrapper register overlay.
  36. */
  37. struct da8xx_usb_regs {
  38. dv_reg revision;
  39. dv_reg control;
  40. dv_reg status;
  41. dv_reg emulation;
  42. dv_reg mode;
  43. dv_reg autoreq;
  44. dv_reg srpfixtime;
  45. dv_reg teardown;
  46. dv_reg intsrc;
  47. dv_reg intsrc_set;
  48. dv_reg intsrc_clr;
  49. dv_reg intmsk;
  50. dv_reg intmsk_set;
  51. dv_reg intmsk_clr;
  52. dv_reg intsrcmsk;
  53. dv_reg eoi;
  54. dv_reg intvector;
  55. dv_reg grndis_size[4];
  56. };
  57. #define da8xx_usb_regs ((struct da8xx_usb_regs *)DA8XX_USB_OTG_BASE)
  58. /* DA8XX interrupt bits definitions */
  59. #define DA8XX_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */
  60. #define DA8XX_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */
  61. #define DA8XX_USB_TXINT_SHIFT 0
  62. #define DA8XX_USB_RXINT_SHIFT 8
  63. #define DA8XX_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */
  64. #define DA8XX_USB_TXINT_MASK \
  65. (DA8XX_USB_TX_ENDPTS_MASK << DA8XX_USB_TXINT_SHIFT)
  66. #define DA8XX_USB_RXINT_MASK \
  67. (DA8XX_USB_RX_ENDPTS_MASK << DA8XX_USB_RXINT_SHIFT)
  68. /* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
  69. #define CFGCHIP2_PHYCLKGD (1 << 17)
  70. #define CFGCHIP2_VBUSSENSE (1 << 16)
  71. #define CFGCHIP2_RESET (1 << 15)
  72. #define CFGCHIP2_OTGMODE (3 << 13)
  73. #define CFGCHIP2_NO_OVERRIDE (0 << 13)
  74. #define CFGCHIP2_FORCE_HOST (1 << 13)
  75. #define CFGCHIP2_FORCE_DEVICE (2 << 13)
  76. #define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
  77. #define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
  78. #define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
  79. #define CFGCHIP2_PHYPWRDN (1 << 10)
  80. #define CFGCHIP2_OTGPWRDN (1 << 9)
  81. #define CFGCHIP2_DATPOL (1 << 8)
  82. #define CFGCHIP2_USB1SUSPENDM (1 << 7)
  83. #define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */
  84. #define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */
  85. #define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */
  86. #define CFGCHIP2_REFFREQ (0xf << 0)
  87. #define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
  88. #define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
  89. #define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
  90. #define DA8XX_USB_VBUS_GPIO (1 << 15)
  91. int usb_phy_on(void);
  92. void usb_phy_off(void);
  93. #endif /* __DA8XX_MUSB_H__ */