omap1610innovator.c 8.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. #if defined(CONFIG_OMAP1610)
  35. #include <./configs/omap1510.h>
  36. #endif
  37. void flash__init (void);
  38. void ether__init (void);
  39. void set_muxconf_regs (void);
  40. void peripheral_power_enable (void);
  41. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  42. static inline void delay (unsigned long loops)
  43. {
  44. __asm__ volatile ("1:\n"
  45. "subs %0, %1, #1\n"
  46. "bne 1b":"=r" (loops):"0" (loops));
  47. }
  48. /*
  49. * Miscellaneous platform dependent initialisations
  50. */
  51. int board_init (void)
  52. {
  53. DECLARE_GLOBAL_DATA_PTR;
  54. /* arch number of OMAP 1510-Board */
  55. /* to be changed for OMAP 1610 Board */
  56. gd->bd->bi_arch_number = 234;
  57. /* adress of boot parameters */
  58. gd->bd->bi_boot_params = 0x10000100;
  59. /* Configure MUX settings */
  60. set_muxconf_regs ();
  61. peripheral_power_enable ();
  62. /* this speeds up your boot a quite a bit. However to make it
  63. * work, you need make sure your kernel startup flush bug is fixed.
  64. * ... rkw ...
  65. */
  66. icache_enable ();
  67. flash__init ();
  68. ether__init ();
  69. return 0;
  70. }
  71. int misc_init_r (void)
  72. {
  73. /* currently empty */
  74. return (0);
  75. }
  76. /******************************
  77. Routine:
  78. Description:
  79. ******************************/
  80. void flash__init (void)
  81. {
  82. #define EMIFS_GlB_Config_REG 0xfffecc0c
  83. unsigned int regval;
  84. regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
  85. /* Turn off write protection for flash devices. */
  86. regval = regval | 0x0001;
  87. *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
  88. }
  89. /*************************************************************
  90. Routine:ether__init
  91. Description: take the Ethernet controller out of reset and wait
  92. for the EEPROM load to complete.
  93. *************************************************************/
  94. void ether__init (void)
  95. {
  96. #define ETH_CONTROL_REG 0x0400030b
  97. #ifdef CONFIG_H2_OMAP1610
  98. #define LAN_RESET_REGISTER 0x0400001c
  99. /* The debug board on which the lan chip resides may not be powered
  100. * ON at the same time as the OMAP chip. So wait in a loop until the
  101. * lan reset register (on the debug board) is available (powered on)
  102. * and reset the lan chip.
  103. */
  104. *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
  105. do {
  106. *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
  107. udelay (3);
  108. } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
  109. do {
  110. *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
  111. udelay (3);
  112. } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
  113. #endif
  114. *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
  115. udelay (3);
  116. }
  117. /******************************
  118. Routine:
  119. Description:
  120. ******************************/
  121. int dram_init (void)
  122. {
  123. DECLARE_GLOBAL_DATA_PTR;
  124. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  125. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  126. return 0;
  127. }
  128. /******************************************************
  129. Routine: set_muxconf_regs
  130. Description: Setting up the configuration Mux registers
  131. specific to the hardware
  132. *******************************************************/
  133. void set_muxconf_regs (void)
  134. {
  135. volatile unsigned int *MuxConfReg;
  136. /* set each registers to its reset value; */
  137. MuxConfReg =
  138. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  139. /* setup for UART1 */
  140. *MuxConfReg &= ~(0x02000000); /* bit 25 */
  141. /* setup for UART2 */
  142. *MuxConfReg &= ~(0x01000000); /* bit 24 */
  143. /* Disable Uwire CS Hi-Z */
  144. *MuxConfReg |= 0x08000000;
  145. MuxConfReg =
  146. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
  147. *MuxConfReg = 0x00000000;
  148. MuxConfReg =
  149. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
  150. *MuxConfReg = 0x00000000;
  151. MuxConfReg =
  152. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
  153. *MuxConfReg = 0x00000000;
  154. MuxConfReg =
  155. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
  156. /*setup mux for UART3 */
  157. *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
  158. *MuxConfReg &= ~0x0000003e;
  159. MuxConfReg =
  160. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
  161. *MuxConfReg = 0x00000000;
  162. MuxConfReg =
  163. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
  164. /* Disable Uwire CS Hi-Z */
  165. *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
  166. MuxConfReg =
  167. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
  168. /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
  169. /* hardware will actually use TX and RTS based on bit 25 in */
  170. /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
  171. *MuxConfReg |= 0x00201000;
  172. MuxConfReg =
  173. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
  174. *MuxConfReg = 0x00000000;
  175. MuxConfReg =
  176. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
  177. *MuxConfReg = 0x00000000;
  178. MuxConfReg =
  179. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
  180. /* setup for UART2 */
  181. /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
  182. /* hardware will actually use TX and RTS based on bit 24 in */
  183. /* FUNC_MUX_CTRL_0. */
  184. *MuxConfReg |= 0x09000000;
  185. MuxConfReg =
  186. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
  187. *MuxConfReg = 0x00000000;
  188. MuxConfReg =
  189. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
  190. *MuxConfReg = 0x00000000;
  191. /* mux setup for SD/MMC driver */
  192. MuxConfReg =
  193. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
  194. *MuxConfReg &= 0xFFFE0FFF;
  195. MuxConfReg =
  196. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
  197. *MuxConfReg = 0x00000000;
  198. MuxConfReg =
  199. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  200. /* bit 13 for MMC2 XOR_CLK */
  201. *MuxConfReg &= ~(0x00002000);
  202. /* bit 29 for UART 1 */
  203. *MuxConfReg &= ~(0x00002000);
  204. MuxConfReg =
  205. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  206. /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
  207. *MuxConfReg |= 0x000C0000;
  208. MuxConfReg =
  209. (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
  210. *MuxConfReg &= ~(0x00000070);
  211. *MuxConfReg &= ~(0x00000008);
  212. *MuxConfReg |= 0x00000003;
  213. *MuxConfReg |= 0x00000180;
  214. MuxConfReg =
  215. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  216. /* bit 17, software controls VBUS */
  217. *MuxConfReg &= ~(0x00020000);
  218. /* Enable USB 48 and 12M clocks */
  219. *MuxConfReg |= 0x00000200;
  220. *MuxConfReg &= ~(0x00000180);
  221. /*2.75V for MMCSDIO1 */
  222. MuxConfReg =
  223. (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
  224. *MuxConfReg = 0x00001FE7;
  225. MuxConfReg =
  226. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
  227. *MuxConfReg = 0x00000000;
  228. MuxConfReg =
  229. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
  230. *MuxConfReg = 0x00000000;
  231. MuxConfReg =
  232. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  233. *MuxConfReg = 0x00000000;
  234. MuxConfReg =
  235. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
  236. *MuxConfReg = 0x00000000;
  237. MuxConfReg =
  238. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
  239. *MuxConfReg = 0x00000000;
  240. MuxConfReg =
  241. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
  242. *MuxConfReg = 0x00000000;
  243. /* Turn on UART2 48 MHZ clock */
  244. MuxConfReg =
  245. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  246. *MuxConfReg |= 0x40000000;
  247. MuxConfReg =
  248. (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
  249. /* setup for USB VBus detection OMAP161x */
  250. *MuxConfReg |= 0x00040000; /* bit 18 */
  251. MuxConfReg =
  252. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  253. /* PullUps for SD/MMC driver */
  254. *MuxConfReg |= ~(0xFFFE0FFF);
  255. MuxConfReg =
  256. (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
  257. *MuxConfReg = COMP_MODE_ENABLE;
  258. }
  259. /******************************************************
  260. Routine: peripheral_power_enable
  261. Description: Enable the power for UART1
  262. *******************************************************/
  263. void peripheral_power_enable (void)
  264. {
  265. #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
  266. #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
  267. *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
  268. }