rx51.c 17 KB

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  1. /*
  2. * (C) Copyright 2012
  3. * Ивайло Димитров <freemangordon@abv.bg>
  4. *
  5. * (C) Copyright 2011-2012
  6. * Pali Rohár <pali.rohar@gmail.com>
  7. *
  8. * (C) Copyright 2010
  9. * Alistair Buxton <a.j.buxton@gmail.com>
  10. *
  11. * Derived from Beagle Board and 3430 SDP code:
  12. * (C) Copyright 2004-2008
  13. * Texas Instruments, <www.ti.com>
  14. *
  15. * Author :
  16. * Sunil Kumar <sunilsaini05@gmail.com>
  17. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  18. *
  19. * Richard Woodruff <r-woodruff2@ti.com>
  20. * Syed Mohammed Khasim <khasim@ti.com>
  21. *
  22. * See file CREDITS for list of people who contributed to this
  23. * project.
  24. *
  25. * This program is free software; you can redistribute it and/or
  26. * modify it under the terms of the GNU General Public License as
  27. * published by the Free Software Foundation; either version 2 of
  28. * the License, or (at your option) any later version.
  29. *
  30. * This program is distributed in the hope that it will be useful,
  31. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  32. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  33. * GNU General Public License for more details.
  34. *
  35. * You should have received a copy of the GNU General Public License
  36. * along with this program; if not, write to the Free Software
  37. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  38. * MA 02111-1307 USA
  39. */
  40. #include <common.h>
  41. #include <watchdog.h>
  42. #include <malloc.h>
  43. #include <twl4030.h>
  44. #include <i2c.h>
  45. #include <video_fb.h>
  46. #include <asm/io.h>
  47. #include <asm/setup.h>
  48. #include <asm/bitops.h>
  49. #include <asm/mach-types.h>
  50. #include <asm/arch/mux.h>
  51. #include <asm/arch/sys_proto.h>
  52. #include <asm/arch/mmc_host_def.h>
  53. #include "rx51.h"
  54. #include "tag_omap.h"
  55. DECLARE_GLOBAL_DATA_PTR;
  56. GraphicDevice gdev;
  57. const omap3_sysinfo sysinfo = {
  58. DDR_STACKED,
  59. "Nokia RX-51",
  60. "OneNAND"
  61. };
  62. /* This structure contains default omap tags needed for booting Maemo 5 */
  63. static struct tag_omap omap[] = {
  64. OMAP_TAG_UART_CONFIG(0x04),
  65. OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
  66. OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
  67. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
  68. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
  69. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
  70. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
  71. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
  72. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
  73. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
  74. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
  75. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
  76. OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
  77. OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
  78. OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
  79. OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
  80. OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
  81. OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
  82. OMAP_TAG_PARTITION_CONFIG(PART1_NAME, PART1_SIZE * PART1_MULL,
  83. PART1_OFFS, PART1_MASK),
  84. OMAP_TAG_PARTITION_CONFIG(PART2_NAME, PART2_SIZE * PART2_MULL,
  85. PART2_OFFS, PART2_MASK),
  86. OMAP_TAG_PARTITION_CONFIG(PART3_NAME, PART3_SIZE * PART3_MULL,
  87. PART3_OFFS, PART3_MASK),
  88. OMAP_TAG_PARTITION_CONFIG(PART4_NAME, PART4_SIZE * PART4_MULL,
  89. PART4_OFFS, PART4_MASK),
  90. OMAP_TAG_PARTITION_CONFIG(PART5_NAME, PART5_SIZE * PART5_MULL,
  91. PART5_OFFS, PART5_MASK),
  92. OMAP_TAG_PARTITION_CONFIG(PART6_NAME, PART6_SIZE * PART6_MULL,
  93. PART6_OFFS, PART6_MASK),
  94. OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
  95. OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
  96. OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
  97. OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
  98. OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
  99. { }
  100. };
  101. static char *boot_reason_ptr;
  102. static char *hw_build_ptr;
  103. static char *nolo_version_ptr;
  104. static char *boot_mode_ptr;
  105. /*
  106. * Routine: init_omap_tags
  107. * Description: Initialize pointers to values in tag_omap
  108. */
  109. static void init_omap_tags(void)
  110. {
  111. char *component;
  112. char *version;
  113. int i = 0;
  114. while (omap[i].hdr.tag) {
  115. switch (omap[i].hdr.tag) {
  116. case OMAP_TAG_BOOT_REASON:
  117. boot_reason_ptr = omap[i].u.boot_reason.reason_str;
  118. break;
  119. case OMAP_TAG_VERSION_STR:
  120. component = omap[i].u.version.component;
  121. version = omap[i].u.version.version;
  122. if (strcmp(component, "hw-build") == 0)
  123. hw_build_ptr = version;
  124. else if (strcmp(component, "nolo") == 0)
  125. nolo_version_ptr = version;
  126. else if (strcmp(component, "boot-mode") == 0)
  127. boot_mode_ptr = version;
  128. break;
  129. default:
  130. break;
  131. }
  132. i++;
  133. }
  134. }
  135. static void reuse_omap_atags(struct tag_omap *t)
  136. {
  137. char *component;
  138. char *version;
  139. while (t->hdr.tag) {
  140. switch (t->hdr.tag) {
  141. case OMAP_TAG_BOOT_REASON:
  142. memset(boot_reason_ptr, 0, 12);
  143. strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
  144. break;
  145. case OMAP_TAG_VERSION_STR:
  146. component = t->u.version.component;
  147. version = t->u.version.version;
  148. if (strcmp(component, "hw-build") == 0) {
  149. memset(hw_build_ptr, 0, 12);
  150. strcpy(hw_build_ptr, version);
  151. } else if (strcmp(component, "nolo") == 0) {
  152. memset(nolo_version_ptr, 0, 12);
  153. strcpy(nolo_version_ptr, version);
  154. } else if (strcmp(component, "boot-mode") == 0) {
  155. memset(boot_mode_ptr, 0, 12);
  156. strcpy(boot_mode_ptr, version);
  157. }
  158. break;
  159. default:
  160. break;
  161. }
  162. t = tag_omap_next(t);
  163. }
  164. }
  165. /*
  166. * Routine: reuse_atags
  167. * Description: Reuse atags from previous bootloader.
  168. * Reuse only only HW build, boot reason, boot mode and nolo
  169. */
  170. static void reuse_atags(void)
  171. {
  172. struct tag *t = (struct tag *)gd->bd->bi_boot_params;
  173. /* First tag must be ATAG_CORE */
  174. if (t->hdr.tag != ATAG_CORE)
  175. return;
  176. if (!boot_reason_ptr || !hw_build_ptr)
  177. return;
  178. /* Last tag must be ATAG_NONE */
  179. while (t->hdr.tag != ATAG_NONE) {
  180. switch (t->hdr.tag) {
  181. case ATAG_REVISION:
  182. memset(hw_build_ptr, 0, 12);
  183. sprintf(hw_build_ptr, "%x", t->u.revision.rev);
  184. break;
  185. case ATAG_BOARD:
  186. reuse_omap_atags((struct tag_omap *)&t->u);
  187. break;
  188. default:
  189. break;
  190. }
  191. t = tag_next(t);
  192. }
  193. }
  194. /*
  195. * Routine: board_init
  196. * Description: Early hardware init.
  197. */
  198. int board_init(void)
  199. {
  200. /* in SRAM or SDRAM, finish GPMC */
  201. gpmc_init();
  202. /* boot param addr */
  203. gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
  204. return 0;
  205. }
  206. /*
  207. * Routine: get_board_revision
  208. * Description: Return board revision.
  209. */
  210. u32 get_board_rev(void)
  211. {
  212. return simple_strtol(hw_build_ptr, NULL, 16);
  213. }
  214. /*
  215. * Routine: setup_board_tags
  216. * Description: Append board specific boot tags.
  217. */
  218. void setup_board_tags(struct tag **in_params)
  219. {
  220. int setup_console_atag;
  221. char *setup_boot_reason_atag;
  222. char *setup_boot_mode_atag;
  223. char *str;
  224. int i;
  225. int size;
  226. int total_size;
  227. struct tag *params;
  228. struct tag_omap *t;
  229. params = (struct tag *)gd->bd->bi_boot_params;
  230. params->u.core.flags = 0x0;
  231. params->u.core.pagesize = 0x1000;
  232. params->u.core.rootdev = 0x0;
  233. /* append omap atag only if env setup_omap_atag is set to 1 */
  234. str = getenv("setup_omap_atag");
  235. if (!str || str[0] != '1')
  236. return;
  237. str = getenv("setup_console_atag");
  238. if (str && str[0] == '1')
  239. setup_console_atag = 1;
  240. else
  241. setup_console_atag = 0;
  242. setup_boot_reason_atag = getenv("setup_boot_reason_atag");
  243. setup_boot_mode_atag = getenv("setup_boot_mode_atag");
  244. params = *in_params;
  245. t = (struct tag_omap *)&params->u;
  246. total_size = sizeof(struct tag_header);
  247. for (i = 0; omap[i].hdr.tag; i++) {
  248. /* skip serial console tag */
  249. if (!setup_console_atag &&
  250. omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
  251. continue;
  252. size = omap[i].hdr.size + sizeof(struct tag_omap_header);
  253. memcpy(t, &omap[i], size);
  254. /* set uart tag to 0 - disable serial console */
  255. if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
  256. t->u.uart.enabled_uarts = 0;
  257. /* change boot reason */
  258. if (setup_boot_reason_atag &&
  259. omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
  260. memset(t->u.boot_reason.reason_str, 0, 12);
  261. strcpy(t->u.boot_reason.reason_str,
  262. setup_boot_reason_atag);
  263. }
  264. /* change boot mode */
  265. if (setup_boot_mode_atag &&
  266. omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
  267. strcmp(omap[i].u.version.component, "boot-mode") == 0) {
  268. memset(t->u.version.version, 0, 12);
  269. strcpy(t->u.version.version, setup_boot_mode_atag);
  270. }
  271. total_size += size;
  272. t = tag_omap_next(t);
  273. }
  274. params->hdr.tag = ATAG_BOARD;
  275. params->hdr.size = total_size >> 2;
  276. params = tag_next(params);
  277. *in_params = params;
  278. }
  279. /*
  280. * Routine: video_hw_init
  281. * Description: Set up the GraphicDevice depending on sys_boot.
  282. */
  283. void *video_hw_init(void)
  284. {
  285. /* fill in Graphic Device */
  286. gdev.frameAdrs = 0x8f9c0000;
  287. gdev.winSizeX = 800;
  288. gdev.winSizeY = 480;
  289. gdev.gdfBytesPP = 2;
  290. gdev.gdfIndex = GDF_16BIT_565RGB;
  291. memset((void *)gdev.frameAdrs, 0, 0xbb800);
  292. return (void *) &gdev;
  293. }
  294. /*
  295. * Routine: twl4030_regulator_set_mode
  296. * Description: Set twl4030 regulator mode over i2c powerbus.
  297. */
  298. static void twl4030_regulator_set_mode(u8 id, u8 mode)
  299. {
  300. u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
  301. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  302. TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
  303. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  304. TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
  305. }
  306. static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
  307. {
  308. u32 i, num_params = *parameters;
  309. u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
  310. /*
  311. * copy the parameters to an un-cached area to avoid coherency
  312. * issues
  313. */
  314. for (i = 0; i < num_params; i++) {
  315. __raw_writel(*parameters, sram_scratch_space);
  316. parameters++;
  317. sram_scratch_space++;
  318. }
  319. /* Now make the PPA call */
  320. do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
  321. }
  322. /*
  323. * Routine: omap3_update_aux_cr_secure_rx51
  324. * Description: Modify the contents Auxiliary Control Register.
  325. * Parameters:
  326. * set_bits - bits to set in ACR
  327. * clr_bits - bits to clear in ACR
  328. */
  329. static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
  330. {
  331. struct emu_hal_params_rx51 emu_romcode_params = { 0, };
  332. u32 acr;
  333. /* Read ACR */
  334. asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
  335. acr &= ~clear_bits;
  336. acr |= set_bits;
  337. emu_romcode_params.num_params = 2;
  338. emu_romcode_params.param1 = acr;
  339. omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
  340. (u32 *)&emu_romcode_params);
  341. }
  342. /*
  343. * Routine: misc_init_r
  344. * Description: Configure board specific parts.
  345. */
  346. int misc_init_r(void)
  347. {
  348. char buf[12];
  349. u8 state;
  350. /* reset lp5523 led */
  351. i2c_set_bus_num(1);
  352. state = 0xff;
  353. i2c_write(0x32, 0x3d, 1, &state, 1);
  354. i2c_set_bus_num(0);
  355. /* initialize twl4030 power managment */
  356. twl4030_power_init();
  357. /* set VSIM to 1.8V */
  358. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
  359. TWL4030_PM_RECEIVER_VSIM_VSEL_18,
  360. TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
  361. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  362. /* store I2C access state */
  363. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, &state,
  364. TWL4030_PM_MASTER_PB_CFG);
  365. /* enable I2C access to powerbus (needed for twl4030 regulator) */
  366. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  367. 0x02);
  368. /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
  369. twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
  370. twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
  371. twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
  372. /* restore I2C access state */
  373. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  374. state);
  375. /* set env variable attkernaddr for relocated kernel */
  376. sprintf(buf, "%#x", KERNEL_ADDRESS);
  377. setenv("attkernaddr", buf);
  378. /* initialize omap tags */
  379. init_omap_tags();
  380. /* reuse atags from previous bootloader */
  381. reuse_atags();
  382. dieid_num_r();
  383. print_cpuinfo();
  384. /*
  385. * Cortex-A8(r1p0..r1p2) errata 430973 workaround
  386. * Set IBE bit in Auxiliary Control Register
  387. */
  388. omap3_update_aux_cr_secure_rx51(1 << 6, 0);
  389. return 0;
  390. }
  391. /*
  392. * Routine: set_muxconf_regs
  393. * Description: Setting up the configuration Mux registers specific to the
  394. * hardware. Many pins need to be moved from protect to primary
  395. * mode.
  396. */
  397. void set_muxconf_regs(void)
  398. {
  399. MUX_RX51();
  400. }
  401. static unsigned long int twl_wd_time; /* last time of watchdog reset */
  402. static unsigned long int twl_i2c_lock;
  403. /*
  404. * Routine: hw_watchdog_reset
  405. * Description: Reset timeout of twl4030 watchdog.
  406. */
  407. void hw_watchdog_reset(void)
  408. {
  409. u8 timeout = 0;
  410. /* do not reset watchdog too often - max every 4s */
  411. if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
  412. return;
  413. /* localy lock twl4030 i2c bus */
  414. if (test_and_set_bit(0, &twl_i2c_lock))
  415. return;
  416. /* read actual watchdog timeout */
  417. twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER, &timeout,
  418. TWL4030_PM_RECEIVER_WATCHDOG_CFG);
  419. /* timeout 0 means watchdog is disabled */
  420. /* reset watchdog timeout to 31s (maximum) */
  421. if (timeout != 0)
  422. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
  423. TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
  424. /* store last watchdog reset time */
  425. twl_wd_time = get_timer(0);
  426. /* localy unlock twl4030 i2c bus */
  427. test_and_clear_bit(0, &twl_i2c_lock);
  428. }
  429. /*
  430. * TWL4030 keypad handler for cfb_console
  431. */
  432. static const char keymap[] = {
  433. /* normal */
  434. 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
  435. 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
  436. 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
  437. 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
  438. 't', 0, 0, 0, 0, 0, 0, 0,
  439. 'y', 0, 0, 0, 0, 0, 0, 0,
  440. 'u', 0, 0, 0, 0, 0, 0, 0,
  441. 'i', 5, 6, 0, 0, 0, 0, 0,
  442. /* fn */
  443. '1', '9', '0', '=', '\b', 0, '*', '+',
  444. '2', '#', '-', '_', '(', ')', '&', '!',
  445. '3', '?', '^', '\r', 0, 156, '$', 238,
  446. '4', '/', '\\', '"', '\'', '@', 0, '<',
  447. '5', '|', '>', 0, 0, 0, 0, 0,
  448. '6', 0, 0, 0, 0, 0, 0, 0,
  449. '7', 0, 0, 0, 0, 0, 0, 0,
  450. '8', 16, 17, 0, 0, 0, 0, 0,
  451. };
  452. static u8 keys[8];
  453. static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
  454. #define KEYBUF_SIZE 32
  455. static u8 keybuf[KEYBUF_SIZE];
  456. static u8 keybuf_head;
  457. static u8 keybuf_tail;
  458. /*
  459. * Routine: rx51_kp_init
  460. * Description: Initialize HW keyboard.
  461. */
  462. int rx51_kp_init(void)
  463. {
  464. int ret = 0;
  465. u8 ctrl;
  466. ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &ctrl,
  467. TWL4030_KEYPAD_KEYP_CTRL_REG);
  468. if (ret)
  469. return ret;
  470. /* turn on keyboard and use hardware scanning */
  471. ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
  472. ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
  473. ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
  474. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  475. TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
  476. /* enable key event status */
  477. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  478. TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
  479. /* enable interrupt generation on rising and falling */
  480. /* this is a workaround for qemu twl4030 emulation */
  481. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  482. TWL4030_KEYPAD_KEYP_EDR, 0x57);
  483. /* enable ISR clear on read */
  484. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  485. TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
  486. return 0;
  487. }
  488. static void rx51_kp_fill(u8 k, u8 mods)
  489. {
  490. /* check if some cursor key without meta fn key was pressed */
  491. if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
  492. keybuf[keybuf_tail++] = '\e';
  493. keybuf_tail %= KEYBUF_SIZE;
  494. keybuf[keybuf_tail++] = '[';
  495. keybuf_tail %= KEYBUF_SIZE;
  496. if (k == 18) /* up */
  497. keybuf[keybuf_tail++] = 'A';
  498. else if (k == 31) /* left */
  499. keybuf[keybuf_tail++] = 'D';
  500. else if (k == 33) /* down */
  501. keybuf[keybuf_tail++] = 'B';
  502. else if (k == 34) /* right */
  503. keybuf[keybuf_tail++] = 'C';
  504. keybuf_tail %= KEYBUF_SIZE;
  505. return;
  506. }
  507. if (mods & 2) { /* fn meta key was pressed */
  508. k = keymap[k+64];
  509. } else {
  510. k = keymap[k];
  511. if (mods & 1) { /* ctrl key was pressed */
  512. if (k >= 'a' && k <= 'z')
  513. k -= 'a' - 1;
  514. }
  515. if (mods & 4) { /* shift key was pressed */
  516. if (k >= 'a' && k <= 'z')
  517. k += 'A' - 'a';
  518. else if (k == '.')
  519. k = ':';
  520. else if (k == ',')
  521. k = ';';
  522. }
  523. }
  524. keybuf[keybuf_tail++] = k;
  525. keybuf_tail %= KEYBUF_SIZE;
  526. }
  527. /*
  528. * Routine: rx51_kp_tstc
  529. * Description: Test if key was pressed (from buffer).
  530. */
  531. int rx51_kp_tstc(void)
  532. {
  533. u8 c, r, dk, i;
  534. u8 intr;
  535. u8 mods;
  536. /* localy lock twl4030 i2c bus */
  537. if (test_and_set_bit(0, &twl_i2c_lock))
  538. return 0;
  539. /* twl4030 remembers up to 2 events */
  540. for (i = 0; i < 2; i++) {
  541. /* check interrupt register for events */
  542. twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &intr,
  543. TWL4030_KEYPAD_KEYP_ISR1+(2*i));
  544. /* no event */
  545. if (!(intr&1))
  546. continue;
  547. /* read the key state */
  548. i2c_read(TWL4030_CHIP_KEYPAD,
  549. TWL4030_KEYPAD_FULL_CODE_7_0, 1, keys, 8);
  550. /* cut out modifier keys from the keystate */
  551. mods = keys[4] >> 4;
  552. keys[4] &= 0x0f;
  553. for (c = 0; c < 8; c++) {
  554. /* get newly pressed keys only */
  555. dk = ((keys[c] ^ old_keys[c])&keys[c]);
  556. old_keys[c] = keys[c];
  557. /* fill the keybuf */
  558. for (r = 0; r < 8; r++) {
  559. if (dk&1)
  560. rx51_kp_fill((c*8)+r, mods);
  561. dk = dk >> 1;
  562. }
  563. }
  564. }
  565. /* localy unlock twl4030 i2c bus */
  566. test_and_clear_bit(0, &twl_i2c_lock);
  567. return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
  568. }
  569. /*
  570. * Routine: rx51_kp_getc
  571. * Description: Get last pressed key (from buffer).
  572. */
  573. int rx51_kp_getc(void)
  574. {
  575. keybuf_head %= KEYBUF_SIZE;
  576. while (!rx51_kp_tstc())
  577. WATCHDOG_RESET();
  578. return keybuf[keybuf_head++];
  579. }
  580. /*
  581. * Routine: board_mmc_init
  582. * Description: Initialize mmc devices.
  583. */
  584. int board_mmc_init(bd_t *bis)
  585. {
  586. omap_mmc_init(0, 0, 0, -1, -1);
  587. omap_mmc_init(1, 0, 0, -1, -1);
  588. return 0;
  589. }