misc.c 17 KB

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  1. /*
  2. * (C) Copyright 2002 ELTEC Elektronik AG
  3. * Frank Gottschling <fgottschling@eltec.de>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /* includes */
  24. #include <common.h>
  25. #include <linux/ctype.h>
  26. #include <pci.h>
  27. #include <net.h>
  28. #include <mpc106.h>
  29. #include <w83c553f.h>
  30. #include "srom.h"
  31. /* imports */
  32. extern int l2_cache_enable (int l2control);
  33. extern void *nvram_read (void *dest, const short src, size_t count);
  34. extern void nvram_write (short dest, const void *src, size_t count);
  35. /* globals */
  36. unsigned int ata_reset_time = 60;
  37. unsigned int scsi_reset_time = 10;
  38. unsigned int eltec_board;
  39. /* BAB750 uses SYM53C875(default) and BAB740 uses SYM53C860
  40. * values fixed after board identification
  41. */
  42. unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
  43. unsigned int scsi_max_scsi_id = 15;
  44. unsigned char scsi_sym53c8xx_ccf = 0x13;
  45. /*----------------------------------------------------------------------------*/
  46. /*
  47. * handle sroms on BAB740/750
  48. * fix ether address
  49. * L2 cache initialization
  50. * ide dma control
  51. */
  52. int misc_init_r (void)
  53. {
  54. revinfo eerev;
  55. char *ptr;
  56. u_int i, l, initSrom, copyNv;
  57. char buf[256];
  58. char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
  59. 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
  60. pci_dev_t bdf;
  61. char sromSYM[] = {
  62. #ifdef TULIP_BUG
  63. /* 10BaseT, 100BaseTx no full duplex modes */
  64. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  65. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  66. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
  67. 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  68. 0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
  69. 0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
  70. 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  71. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  72. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  73. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  74. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  75. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  76. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  77. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  78. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  79. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
  80. #endif
  81. /* 10BaseT, 10BaseT-FD, 100BaseTx, 100BaseTx-FD */
  82. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  83. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  84. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
  85. 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  86. 0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
  87. 0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
  88. 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
  89. 0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
  90. 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  91. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  92. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  93. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  94. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  95. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  96. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  97. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
  98. };
  99. char sromMII[] = {
  100. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  101. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  102. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
  103. 0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  104. 0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
  105. 0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
  106. 0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
  107. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  108. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  109. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  110. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  111. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  112. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  113. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  114. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  115. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
  116. };
  117. /*
  118. * Check/Remake revision info
  119. */
  120. initSrom = 0;
  121. copyNv = 0;
  122. /* read out current revision srom contens */
  123. el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
  124. SECOND_DEVICE, FIRST_BLOCK);
  125. /* read out current nvram shadow image */
  126. nvram_read (buf, CONFIG_SYS_NV_SROM_COPY_ADDR, CONFIG_SYS_SROM_SIZE);
  127. if (strcmp (eerev.magic, "ELTEC") != 0)
  128. {
  129. /* srom is not initialized -> create a default revision info */
  130. for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
  131. *ptr++ = 0x00;
  132. strcpy(eerev.magic, "ELTEC");
  133. eerev.revrev[0] = 1;
  134. eerev.revrev[1] = 0;
  135. eerev.size = 0x00E0;
  136. eerev.category[0] = 0x01;
  137. /* node id from dead e128 as default */
  138. eerev.etheraddr[0] = 0x00;
  139. eerev.etheraddr[1] = 0x00;
  140. eerev.etheraddr[2] = 0x5B;
  141. eerev.etheraddr[3] = 0x00;
  142. eerev.etheraddr[4] = 0x2E;
  143. eerev.etheraddr[5] = 0x4D;
  144. /* cache config word for bab750 */
  145. *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
  146. initSrom = 1; /* force dialog */
  147. copyNv = 1; /* copy to nvram */
  148. }
  149. if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CONFIG_SYS_SROM_SIZE) !=
  150. el_srom_checksum((u_char*)buf, CONFIG_SYS_SROM_SIZE)))
  151. {
  152. printf ("Invalid revision info copy in nvram !\n");
  153. printf ("Press key:\n <c> to copy current revision info to nvram.\n");
  154. printf (" <r> to reenter revision info.\n");
  155. printf ("=> ");
  156. if (0 != readline (NULL))
  157. {
  158. switch ((char)toupper(console_buffer[0]))
  159. {
  160. case 'C':
  161. copyNv = 1;
  162. break;
  163. case 'R':
  164. copyNv = 1;
  165. initSrom = 1;
  166. break;
  167. }
  168. }
  169. }
  170. if (initSrom)
  171. {
  172. memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */
  173. printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]);
  174. if (0 != readline (NULL))
  175. {
  176. eerev.revision[0][0] = (char)toupper(console_buffer[0]);
  177. memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
  178. }
  179. printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]);
  180. if (1 == readline (NULL))
  181. {
  182. eerev.revision[0][1] = (char)toupper(console_buffer[0]);
  183. }
  184. printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board);
  185. if (11 == readline (NULL))
  186. {
  187. for (i=0; i<11; i++)
  188. eerev.board[i] = (char)toupper(console_buffer[i]);
  189. eerev.board[11] = '\0';
  190. }
  191. printf ("Enter serial number: %s ", (char *)&eerev.serial );
  192. if (6 == readline (NULL))
  193. {
  194. for (i=0; i<6; i++)
  195. eerev.serial[i] = console_buffer[i];
  196. eerev.serial[6] = '\0';
  197. }
  198. printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ",
  199. eerev.etheraddr[0], eerev.etheraddr[1],
  200. eerev.etheraddr[2], eerev.etheraddr[3],
  201. eerev.etheraddr[4], eerev.etheraddr[5]);
  202. if (12 == readline (NULL))
  203. {
  204. for (i=0; i<12; i+=2)
  205. eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
  206. hex[toupper(console_buffer[i+1])-'0']);
  207. }
  208. l = strlen ((char *)&eerev.text);
  209. printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
  210. if (0 != readline (NULL))
  211. {
  212. for (i = l; i<63; i++)
  213. eerev.text[i] = console_buffer[i-l];
  214. eerev.text[63] = '\0';
  215. }
  216. if (strstr ((char *)&eerev.board, "75") != NULL)
  217. eltec_board = 750;
  218. else
  219. eltec_board = 740;
  220. if (eltec_board == 750)
  221. {
  222. if (CPU_TYPE == CPU_TYPE_750)
  223. *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
  224. else
  225. *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
  226. printf("Enter L2Cache config word with leading zero (HEX): %08X ",
  227. *(int*)&eerev.res[0] );
  228. if (0 != readline (NULL))
  229. {
  230. for (i=0; i<7; i+=2)
  231. {
  232. eerev.res[i>>1] =
  233. (char)(16*hex[toupper(console_buffer[i])-'0'] +
  234. hex[toupper(console_buffer[i+1])-'0']);
  235. }
  236. }
  237. /* prepare network eeprom */
  238. sromMII[20] = eerev.etheraddr[0];
  239. sromMII[21] = eerev.etheraddr[1];
  240. sromMII[22] = eerev.etheraddr[2];
  241. sromMII[23] = eerev.etheraddr[3];
  242. sromMII[24] = eerev.etheraddr[4];
  243. sromMII[25] = eerev.etheraddr[5];
  244. printf("\nSRom: Writing DEC21143 MII info .. ");
  245. if (dc_srom_store ((u_short *)sromMII) == -1)
  246. printf("FAILED\n");
  247. else
  248. printf("OK\n");
  249. }
  250. if (eltec_board == 740)
  251. {
  252. *(int *)&eerev.res[0] = 0;
  253. sromSYM[20] = eerev.etheraddr[0];
  254. sromSYM[21] = eerev.etheraddr[1];
  255. sromSYM[22] = eerev.etheraddr[2];
  256. sromSYM[23] = eerev.etheraddr[3];
  257. sromSYM[24] = eerev.etheraddr[4];
  258. sromSYM[25] = eerev.etheraddr[5];
  259. printf("\nSRom: Writing DEC21143 SYM info .. ");
  260. if (dc_srom_store ((u_short *)sromSYM) == -1)
  261. printf("FAILED\n");
  262. else
  263. printf("OK\n");
  264. }
  265. /* update CRC */
  266. eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
  267. /* write new values */
  268. printf("\nSRom: Writing revision info ...... ");
  269. if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
  270. sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
  271. printf("FAILED\n\n");
  272. else
  273. printf("OK\n\n");
  274. /* write new values as shadow image to nvram */
  275. nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
  276. } /*if (initSrom) */
  277. /* copy current values as shadow image to nvram */
  278. if (initSrom == 0 && copyNv == 1)
  279. nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
  280. /* update environment */
  281. sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
  282. eerev.etheraddr[0], eerev.etheraddr[1],
  283. eerev.etheraddr[2], eerev.etheraddr[3],
  284. eerev.etheraddr[4], eerev.etheraddr[5]);
  285. setenv ("ethaddr", buf);
  286. /* print actual board identification */
  287. printf("Ident: %s Ser %s Rev %c%c\n",
  288. eerev.board, (char *)&eerev.serial,
  289. eerev.revision[0][0], eerev.revision[0][1]);
  290. /* global board ident */
  291. if (strstr ((char *)&eerev.board, "75") != NULL)
  292. eltec_board = 750;
  293. else
  294. eltec_board = 740;
  295. /*
  296. * L2 cache configuration
  297. */
  298. #if defined(CONFIG_SYS_L2_BAB7xx)
  299. ptr = getenv("l2cache");
  300. if (*ptr == '0')
  301. {
  302. printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
  303. }
  304. else
  305. {
  306. printf ("Cache: L2 activated on BAB%d\n", eltec_board);
  307. l2_cache_enable(*(int*)&eerev.res[0]);
  308. }
  309. #endif
  310. /*
  311. * Reconfig ata reset timeout from environment
  312. */
  313. if ((ptr = getenv ("ata_reset_time")) != NULL)
  314. {
  315. ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
  316. }
  317. else
  318. {
  319. sprintf (buf, "%d", ata_reset_time);
  320. setenv ("ata_reset_time", buf);
  321. }
  322. /*
  323. * Reconfig scsi reset timeout from environment
  324. */
  325. if ((ptr = getenv ("scsi_reset_time")) != NULL)
  326. {
  327. scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
  328. }
  329. else
  330. {
  331. sprintf (buf, "%d", scsi_reset_time);
  332. setenv ("scsi_reset_time", buf);
  333. }
  334. if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
  335. {
  336. if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
  337. {
  338. /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 MHz */
  339. scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
  340. scsi_max_scsi_id = 7;
  341. scsi_sym53c8xx_ccf = 0x15;
  342. pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
  343. }
  344. if ((ptr = getenv ("ide_dma_off")) != NULL)
  345. {
  346. u_long dma_off = simple_strtoul (ptr, NULL, 10);
  347. /*
  348. * setup user defined registers
  349. * s.a. linux/drivers/ide/sl82c105.c
  350. */
  351. bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */
  352. if (dma_off & 1)
  353. {
  354. pci_write_config_byte (bdf, 0x46, 1);
  355. printf("IDE: DMA off flag set: Bus 0 : Dev 0\n");
  356. }
  357. if (dma_off & 2)
  358. {
  359. pci_write_config_byte (bdf, 0x4a, 1);
  360. printf("IDE: DMA off flag set: Bus 0 : Dev 1\n");
  361. }
  362. if (dma_off & 4)
  363. {
  364. pci_write_config_byte (bdf, 0x4e, 1);
  365. printf("IDE: DMA off flag set: Bus 1 : Dev 0\n");
  366. }
  367. if (dma_off & 8)
  368. {
  369. pci_write_config_byte (bdf, 0x52, 1);
  370. printf("IDE: DMA off flag set: Bus 1 : Dev 1\n");
  371. }
  372. }
  373. }
  374. return (0);
  375. }
  376. /*----------------------------------------------------------------------------*/
  377. /*
  378. * BAB740 uses KENDIN KS8761 modem chip with not common setup values
  379. */
  380. #ifdef CONFIG_TULIP_SELECT_MEDIA
  381. /* Register bits.
  382. */
  383. #define BMR_SWR 0x00000001 /* Software Reset */
  384. #define STS_TS 0x00700000 /* Transmit Process State */
  385. #define STS_RS 0x000e0000 /* Receive Process State */
  386. #define OMR_ST 0x00002000 /* Start/Stop Transmission Command */
  387. #define OMR_SR 0x00000002 /* Start/Stop Receive */
  388. #define OMR_PS 0x00040000 /* Port Select */
  389. #define OMR_SDP 0x02000000 /* SD Polarity - MUST BE ASSERTED */
  390. #define OMR_PM 0x00000080 /* Pass All Multicast */
  391. #define OMR_PR 0x00000040 /* Promiscuous Mode */
  392. #define OMR_PCS 0x00800000 /* PCS Function */
  393. #define OMR_TTM 0x00400000 /* Transmit Threshold Mode */
  394. /* Ethernet chip registers.
  395. */
  396. #define DE4X5_BMR 0x000 /* Bus Mode Register */
  397. #define DE4X5_TPD 0x008 /* Transmit Poll Demand Reg */
  398. #define DE4X5_RRBA 0x018 /* RX Ring Base Address Reg */
  399. #define DE4X5_TRBA 0x020 /* TX Ring Base Address Reg */
  400. #define DE4X5_STS 0x028 /* Status Register */
  401. #define DE4X5_OMR 0x030 /* Operation Mode Register */
  402. #define DE4X5_SISR 0x060 /* SIA Status Register */
  403. #define DE4X5_SICR 0x068 /* SIA Connectivity Register */
  404. #define DE4X5_TXRX 0x070 /* SIA Transmit and Receive Register */
  405. #define DE4X5_GPPR 0x078 /* General Purpose Port register */
  406. #define DE4X5_APROM 0x048 /* Ethernet Address PROM */
  407. /*----------------------------------------------------------------------------*/
  408. static int INL(struct eth_device* dev, u_long addr)
  409. {
  410. return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
  411. }
  412. /*----------------------------------------------------------------------------*/
  413. static void OUTL(struct eth_device* dev, int command, u_long addr)
  414. {
  415. *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
  416. }
  417. /*----------------------------------------------------------------------------*/
  418. static void media_reg_init (
  419. struct eth_device* dev,
  420. u32 csr14,
  421. u32 csr15_dir,
  422. u32 csr15_v0,
  423. u32 csr15_v1,
  424. u32 csr6 )
  425. {
  426. OUTL(dev, 0, DE4X5_OMR); /* CSR6 */
  427. udelay(10 * 1000);
  428. OUTL(dev, 0, DE4X5_SICR); /* CSR13 */
  429. OUTL(dev, 1, DE4X5_SICR); /* CSR13 */
  430. udelay(10 * 1000);
  431. OUTL(dev, csr14, DE4X5_TXRX); /* CSR14 */
  432. OUTL(dev, csr15_dir, DE4X5_GPPR); /* CSR15 */
  433. OUTL(dev, csr15_v0, DE4X5_GPPR); /* CSR15 */
  434. udelay(10 * 1000);
  435. OUTL(dev, csr15_v1, DE4X5_GPPR); /* CSR15 */
  436. OUTL(dev, 0x00000301, DE4X5_SISR); /* CSR12 */
  437. OUTL(dev, csr6, DE4X5_OMR); /* CSR6 */
  438. }
  439. /*----------------------------------------------------------------------------*/
  440. void dc21x4x_select_media(struct eth_device* dev)
  441. {
  442. int i, status, ext;
  443. extern unsigned int eltec_board;
  444. if (eltec_board == 740)
  445. {
  446. printf("SYM media select "); /* BAB740 */
  447. /* start autoneg. with 10 mbit */
  448. media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
  449. ext = status = 0;
  450. for (i=0; i<2000+ext; i++)
  451. {
  452. status = INL(dev, DE4X5_SISR);
  453. udelay(1000);
  454. if (status & 0x2000) ext = 2000;
  455. if ((status & 0x7000) == 0x5000) break;
  456. }
  457. /* autoneg. ok -> 100MB FD */
  458. if ((status & 0x0100f000) == 0x0100d000)
  459. {
  460. media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
  461. printf("100baseTx-FD\n");
  462. }
  463. /* autoneg. ok -> 100MB HD */
  464. else if ((status & 0x0080f000) == 0x0080d000)
  465. {
  466. media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
  467. printf("100baseTx\n");
  468. }
  469. /* autoneg. ok -> 10MB FD */
  470. else if ((status & 0x0040f000) == 0x0040d000)
  471. {
  472. media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
  473. printf("10baseT-FD\n");
  474. }
  475. /* autoneg. fail -> 10MB HD */
  476. else
  477. {
  478. media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
  479. (OMR_SDP | OMR_TTM | OMR_PM));
  480. printf("10baseT\n");
  481. }
  482. }
  483. else
  484. {
  485. printf("MII media selected\n"); /* BAB750 */
  486. OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */
  487. }
  488. }
  489. #endif /* CONFIG_TULIP_SELECT_MEDIA */
  490. /*---------------------------------------------------------------------------*/