enbw_cmc.c 18 KB

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  1. /*
  2. * (C) Copyright 2011
  3. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  4. *
  5. * Based on:
  6. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  7. *
  8. * Based on da830evm.c. Original Copyrights follow:
  9. *
  10. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  11. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <common.h>
  28. #include <command.h>
  29. #include <environment.h>
  30. #include <hwconfig.h>
  31. #include <i2c.h>
  32. #include <malloc.h>
  33. #include <miiphy.h>
  34. #include <mmc.h>
  35. #include <net.h>
  36. #include <netdev.h>
  37. #include <spi.h>
  38. #include <linux/ctype.h>
  39. #include <asm/gpio.h>
  40. #include <asm/io.h>
  41. #include <asm/arch/da850_lowlevel.h>
  42. #include <asm/arch/davinci_misc.h>
  43. #include <asm/arch/emif_defs.h>
  44. #include <asm/arch/emac_defs.h>
  45. #include <asm/arch/gpio.h>
  46. #include <asm/arch/pinmux_defs.h>
  47. #include <asm/arch/hardware.h>
  48. #include <asm/arch/sdmmc_defs.h>
  49. #include <asm/arch/timer_defs.h>
  50. DECLARE_GLOBAL_DATA_PTR;
  51. const struct lpsc_resource lpsc[] = {
  52. { DAVINCI_LPSC_AEMIF },
  53. { DAVINCI_LPSC_SPI1 },
  54. { DAVINCI_LPSC_ARM_RAM_ROM },
  55. { DAVINCI_LPSC_UART0 },
  56. { DAVINCI_LPSC_EMAC },
  57. { DAVINCI_LPSC_UART0 },
  58. { DAVINCI_LPSC_GPIO },
  59. { DAVINCI_LPSC_DDR_EMIF },
  60. { DAVINCI_LPSC_UART1 },
  61. { DAVINCI_LPSC_UART2 },
  62. { DAVINCI_LPSC_MMC_SD1 },
  63. { DAVINCI_LPSC_USB20 },
  64. { DAVINCI_LPSC_USB11 },
  65. };
  66. const int lpsc_size = ARRAY_SIZE(lpsc);
  67. static const struct pinmux_config enbw_pins[] = {
  68. { pinmux(0), 8, 0 },
  69. { pinmux(0), 8, 1 },
  70. { pinmux(0), 8, 2 },
  71. { pinmux(0), 8, 3 },
  72. { pinmux(0), 8, 4 },
  73. { pinmux(0), 8, 5 },
  74. { pinmux(1), 4, 0 },
  75. { pinmux(1), 8, 1 },
  76. { pinmux(1), 8, 2 },
  77. { pinmux(1), 8, 3 },
  78. { pinmux(1), 8, 4 },
  79. { pinmux(1), 8, 5 },
  80. { pinmux(1), 8, 6 },
  81. { pinmux(1), 4, 7 },
  82. { pinmux(2), 8, 0 },
  83. { pinmux(5), 1, 0 },
  84. { pinmux(5), 1, 3 },
  85. { pinmux(5), 1, 7 },
  86. { pinmux(5), 1, 5 },
  87. { pinmux(5), 1, 4 },
  88. { pinmux(5), 1, 3 },
  89. { pinmux(5), 1, 2 },
  90. { pinmux(5), 1, 1 },
  91. { pinmux(5), 1, 0 },
  92. { pinmux(6), 8, 0 },
  93. { pinmux(6), 8, 1 },
  94. { pinmux(6), 8, 2 },
  95. { pinmux(6), 8, 3 },
  96. { pinmux(6), 8, 4 },
  97. { pinmux(6), 8, 5 },
  98. { pinmux(6), 1, 7 },
  99. { pinmux(7), 8, 2 },
  100. { pinmux(7), 1, 3 },
  101. { pinmux(7), 8, 6 },
  102. { pinmux(7), 1, 7 },
  103. { pinmux(13), 8, 2 },
  104. { pinmux(13), 8, 3 },
  105. { pinmux(13), 8, 4 },
  106. { pinmux(13), 8, 5 },
  107. { pinmux(13), 8, 6 },
  108. { pinmux(13), 8, 7 },
  109. { pinmux(14), 8, 0 },
  110. { pinmux(14), 8, 1 },
  111. { pinmux(16), 8, 1 },
  112. { pinmux(16), 8, 2 },
  113. { pinmux(16), 8, 3 },
  114. { pinmux(16), 8, 4 },
  115. { pinmux(16), 8, 5 },
  116. { pinmux(16), 8, 6 },
  117. { pinmux(16), 8, 7 },
  118. { pinmux(17), 1, 0 },
  119. { pinmux(17), 1, 1 },
  120. { pinmux(17), 1, 2 },
  121. { pinmux(17), 8, 3 },
  122. { pinmux(17), 8, 4 },
  123. { pinmux(17), 8, 5 },
  124. { pinmux(17), 8, 6 },
  125. { pinmux(17), 8, 7 },
  126. { pinmux(18), 8, 0 },
  127. { pinmux(18), 8, 1 },
  128. { pinmux(18), 2, 2 },
  129. { pinmux(18), 2, 3 },
  130. { pinmux(18), 2, 4 },
  131. { pinmux(18), 8, 6 },
  132. { pinmux(18), 8, 7 },
  133. { pinmux(19), 8, 0 },
  134. { pinmux(19), 2, 1 },
  135. { pinmux(19), 2, 2 },
  136. { pinmux(19), 2, 3 },
  137. { pinmux(19), 2, 4 },
  138. { pinmux(19), 8, 5 },
  139. { pinmux(19), 8, 6 },
  140. };
  141. const struct pinmux_resource pinmuxes[] = {
  142. PINMUX_ITEM(emac_pins_mii),
  143. PINMUX_ITEM(emac_pins_mdio),
  144. PINMUX_ITEM(i2c0_pins),
  145. PINMUX_ITEM(emifa_pins_cs2),
  146. PINMUX_ITEM(emifa_pins_cs3),
  147. PINMUX_ITEM(emifa_pins_cs4),
  148. PINMUX_ITEM(emifa_pins_nand),
  149. PINMUX_ITEM(emifa_pins_nor),
  150. PINMUX_ITEM(spi1_pins_base),
  151. PINMUX_ITEM(spi1_pins_scs0),
  152. PINMUX_ITEM(uart1_pins_txrx),
  153. PINMUX_ITEM(uart2_pins_txrx),
  154. PINMUX_ITEM(uart2_pins_rtscts),
  155. PINMUX_ITEM(enbw_pins),
  156. };
  157. const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
  158. struct gpio_config {
  159. char name[GPIO_NAME_SIZE];
  160. unsigned char bank;
  161. unsigned char gpio;
  162. unsigned char out;
  163. unsigned char value;
  164. };
  165. static const struct gpio_config enbw_gpio_config_hut[] = {
  166. { "RS485 enable", 8, 11, 1, 0 },
  167. { "RS485 iso", 8, 10, 1, 1 },
  168. { "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
  169. { "W2HUT RS485 iso", 8, 8, 1, 1 },
  170. };
  171. static const struct gpio_config enbw_gpio_config_w[] = {
  172. { "RS485 enable", 8, 11, 1, 0 },
  173. { "RS485 iso", 8, 10, 1, 0 },
  174. { "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
  175. { "W2HUT RS485 iso", 8, 8, 1, 0 },
  176. };
  177. static const struct gpio_config enbw_gpio_config[] = {
  178. { "LAN reset", 7, 15, 1, 1 },
  179. { "ena 11V PLC", 7, 14, 1, 0 },
  180. { "ena 1.5V PLC", 7, 13, 1, 0 },
  181. { "disable VBUS", 7, 12, 1, 1 },
  182. { "PLC reset", 6, 13, 1, 0 },
  183. { "LCM RS", 6, 12, 1, 0 },
  184. { "LCM R/W", 6, 11, 1, 0 },
  185. { "PLC pairing", 6, 10, 1, 1 },
  186. { "PLC MDIO CLK", 6, 9, 1, 0 },
  187. { "HK218", 6, 8, 1, 0 },
  188. { "HK218 Rx", 6, 1, 1, 1 },
  189. { "TPM reset", 6, 0, 1, 0 },
  190. { "Board-Type", 3, 9, 0, 0 },
  191. { "HW-ID0", 2, 7, 0, 0 },
  192. { "HW-ID1", 2, 6, 0, 0 },
  193. { "HW-ID2", 2, 3, 0, 0 },
  194. { "PV-IF RxD ena", 0, 15, 1, 1 },
  195. { "LED1", 1, 15, 1, 1 },
  196. { "LED2", 0, 1, 1, 1 },
  197. { "LED3", 0, 2, 1, 1 },
  198. { "LED4", 0, 3, 1, 1 },
  199. { "LED5", 0, 4, 1, 1 },
  200. { "LED6", 0, 5, 1, 0 },
  201. { "LED7", 0, 6, 1, 0 },
  202. { "LED8", 0, 14, 1, 0 },
  203. { "USER1", 0, 12, 0, 0 },
  204. { "USER2", 0, 13, 0, 0 },
  205. };
  206. #define PHY_POWER 0x0800
  207. static void enbw_cmc_switch(int port, int on)
  208. {
  209. const char *devname;
  210. unsigned char phyaddr = 3;
  211. unsigned char reg = 0;
  212. unsigned short data;
  213. if (port == 1)
  214. phyaddr = 2;
  215. devname = miiphy_get_current_dev();
  216. if (!devname) {
  217. printf("Error: no mii device\n");
  218. return;
  219. }
  220. if (miiphy_read(devname, phyaddr, reg, &data) != 0) {
  221. printf("Error reading from the PHY addr=%02x reg=%02x\n",
  222. phyaddr, reg);
  223. return;
  224. }
  225. if (on)
  226. data &= ~PHY_POWER;
  227. else
  228. data |= PHY_POWER;
  229. if (miiphy_write(devname, phyaddr, reg, data) != 0) {
  230. printf("Error writing to the PHY addr=%02x reg=%02x\n",
  231. phyaddr, reg);
  232. return;
  233. }
  234. }
  235. static int enbw_cmc_init_gpio(const struct gpio_config *conf, int sz)
  236. {
  237. int i, ret;
  238. for (i = 0; i < sz; i++) {
  239. int gpio = conf[i].bank * 16 +
  240. conf[i].gpio;
  241. ret = gpio_request(gpio, conf[i].name);
  242. if (ret) {
  243. printf("%s: Could not get %s gpio\n", __func__,
  244. conf[i].name);
  245. return ret;
  246. }
  247. if (conf[i].out)
  248. gpio_direction_output(gpio,
  249. conf[i].value);
  250. else
  251. gpio_direction_input(gpio);
  252. }
  253. return 0;
  254. }
  255. int board_init(void)
  256. {
  257. int board_type, hw_id;
  258. #ifndef CONFIG_USE_IRQ
  259. irq_init();
  260. #endif
  261. /* address of boot parameters, not used as booting with DTT */
  262. gd->bd->bi_boot_params = 0;
  263. enbw_cmc_init_gpio(enbw_gpio_config, ARRAY_SIZE(enbw_gpio_config));
  264. /* detect HW version */
  265. board_type = gpio_get_value(CONFIG_ENBW_CMC_BOARD_TYPE);
  266. hw_id = gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT0) +
  267. (gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT1) << 1) +
  268. (gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT2) << 2);
  269. printf("BOARD: CMC-%s hw id: %d\n", (board_type ? "w2" : "hut"),
  270. hw_id);
  271. if (board_type)
  272. enbw_cmc_init_gpio(enbw_gpio_config_w,
  273. ARRAY_SIZE(enbw_gpio_config_w));
  274. else
  275. enbw_cmc_init_gpio(enbw_gpio_config_hut,
  276. ARRAY_SIZE(enbw_gpio_config_hut));
  277. /* setup the SUSPSRC for ARM to control emulation suspend */
  278. clrbits_le32(&davinci_syscfg_regs->suspsrc,
  279. (DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  280. DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  281. DAVINCI_SYSCFG_SUSPSRC_UART2));
  282. return 0;
  283. }
  284. #ifdef CONFIG_DRIVER_TI_EMAC
  285. #define KSZ_CMD_READ 0x03
  286. #define KSZ_CMD_WRITE 0x02
  287. #define KSZ_ID 0x95
  288. static int enbw_cmc_switch_read(struct spi_slave *spi, u8 reg, u8 *val)
  289. {
  290. unsigned long flags = SPI_XFER_BEGIN;
  291. int ret;
  292. int cmd_len;
  293. u8 cmd[2];
  294. cmd[0] = KSZ_CMD_READ;
  295. cmd[1] = reg;
  296. cmd_len = 2;
  297. ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
  298. if (ret) {
  299. debug("Failed to send command (%zu bytes): %d\n",
  300. cmd_len, ret);
  301. return -EINVAL;
  302. }
  303. flags |= SPI_XFER_END;
  304. *val = 0;
  305. cmd_len = 1;
  306. ret = spi_xfer(spi, cmd_len * 8, NULL, val, flags);
  307. if (ret) {
  308. debug("Failed to read (%zu bytes): %d\n",
  309. cmd_len, ret);
  310. return -EINVAL;
  311. }
  312. return 0;
  313. }
  314. static int enbw_cmc_switch_read_ident(struct spi_slave *spi)
  315. {
  316. int ret;
  317. u8 val;
  318. ret = enbw_cmc_switch_read(spi, 0, &val);
  319. if (ret) {
  320. debug("Failed to read\n");
  321. return -EINVAL;
  322. }
  323. if (val != KSZ_ID)
  324. return -EINVAL;
  325. return 0;
  326. }
  327. static int enbw_cmc_switch_write(struct spi_slave *spi, unsigned long reg,
  328. unsigned long val)
  329. {
  330. unsigned long flags = SPI_XFER_BEGIN;
  331. int ret;
  332. int cmd_len;
  333. u8 cmd[3];
  334. cmd[0] = KSZ_CMD_WRITE;
  335. cmd[1] = reg;
  336. cmd[2] = val;
  337. cmd_len = 3;
  338. flags |= SPI_XFER_END;
  339. ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
  340. if (ret) {
  341. debug("Failed to send command (%zu bytes): %d\n",
  342. cmd_len, ret);
  343. return -EINVAL;
  344. }
  345. udelay(1000);
  346. ret = enbw_cmc_switch_read(spi, reg, &cmd[0]);
  347. if (ret) {
  348. debug("Failed to read\n");
  349. return -EINVAL;
  350. }
  351. if (val != cmd[0])
  352. debug("warning: reg: %lx va: %x soll: %lx\n",
  353. reg, cmd[0], val);
  354. return 0;
  355. }
  356. static int enbw_cmc_eof(unsigned char *ptr)
  357. {
  358. if (*ptr == 0xff)
  359. return 1;
  360. return 0;
  361. }
  362. static char *enbw_cmc_getnewline(char *ptr)
  363. {
  364. while (*ptr != 0x0a) {
  365. ptr++;
  366. if (enbw_cmc_eof((unsigned char *)ptr))
  367. return NULL;
  368. }
  369. ptr++;
  370. return ptr;
  371. }
  372. static char *enbw_cmc_getvalue(char *ptr, int *value)
  373. {
  374. int end = 0;
  375. *value = -EINVAL;
  376. if (!isxdigit(*ptr))
  377. end = 1;
  378. while (end) {
  379. if ((*ptr == '#') || (*ptr == ';')) {
  380. ptr = enbw_cmc_getnewline(ptr);
  381. return ptr;
  382. }
  383. if (ptr != NULL) {
  384. if (isxdigit(*ptr)) {
  385. end = 0;
  386. } else if (*ptr == 0x0a) {
  387. ptr++;
  388. return ptr;
  389. } else {
  390. ptr++;
  391. if (enbw_cmc_eof((unsigned char *)ptr))
  392. return NULL;
  393. }
  394. } else {
  395. return NULL;
  396. }
  397. }
  398. *value = (int)simple_strtoul((const char *)ptr, &ptr, 16);
  399. ptr++;
  400. return ptr;
  401. }
  402. static int enbw_cmc_config_switch(unsigned long addr)
  403. {
  404. struct spi_slave *spi;
  405. char *ptr = (char *)addr;
  406. int value, reg;
  407. int ret;
  408. int bus, cs, max_hz, spi_mode;
  409. debug("configure switch with file on addr: 0x%lx\n", addr);
  410. bus = 0;
  411. cs = 0;
  412. max_hz = 1000000;
  413. spi_mode = 0;
  414. spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
  415. if (!spi) {
  416. printf("Failed to set up slave\n");
  417. return -EINVAL;
  418. }
  419. ret = spi_claim_bus(spi);
  420. if (ret) {
  421. debug("Failed to claim SPI bus: %d\n", ret);
  422. goto err_claim_bus;
  423. }
  424. ret = enbw_cmc_switch_read_ident(spi);
  425. if (ret)
  426. goto err_claim_bus;
  427. ptr = (char *)addr;
  428. while (ptr != NULL) {
  429. ptr = enbw_cmc_getvalue(ptr, &reg);
  430. if (ptr != NULL) {
  431. ptr = enbw_cmc_getvalue(ptr, &value);
  432. if ((ptr != NULL) && (value >= 0))
  433. if (enbw_cmc_switch_write(spi, reg, value))
  434. goto err_read;
  435. }
  436. }
  437. return 0;
  438. err_read:
  439. spi_release_bus(spi);
  440. err_claim_bus:
  441. spi_free_slave(spi);
  442. return -EINVAL;
  443. }
  444. static int do_switch(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  445. {
  446. unsigned long addr;
  447. if (argc < 2)
  448. return cmd_usage(cmdtp);
  449. addr = simple_strtoul(argv[1], NULL, 16);
  450. enbw_cmc_config_switch(addr);
  451. return 0;
  452. }
  453. U_BOOT_CMD(switch, 3, 1, do_switch,
  454. "switch addr",
  455. "[addr]"
  456. );
  457. /*
  458. * Initializes on-board ethernet controllers.
  459. */
  460. int board_eth_init(bd_t *bis)
  461. {
  462. const char *s;
  463. size_t len;
  464. davinci_emac_mii_mode_sel(0);
  465. /* send a config file to the switch */
  466. s = hwconfig_subarg("switch", "config", &len);
  467. if (len) {
  468. unsigned long addr = simple_strtoul(s, NULL, 16);
  469. enbw_cmc_config_switch(addr);
  470. }
  471. if (!davinci_emac_initialize()) {
  472. printf("Error: Ethernet init failed!\n");
  473. return -1;
  474. }
  475. if (hwconfig_subarg_cmp("switch", "lan", "on"))
  476. /* Switch port lan on */
  477. enbw_cmc_switch(1, 1);
  478. else
  479. enbw_cmc_switch(1, 0);
  480. if (hwconfig_subarg_cmp("switch", "pwl", "on"))
  481. /* Switch port pwl on */
  482. enbw_cmc_switch(2, 1);
  483. else
  484. enbw_cmc_switch(2, 0);
  485. return 0;
  486. }
  487. #endif /* CONFIG_DRIVER_TI_EMAC */
  488. #ifdef CONFIG_PREBOOT
  489. static uchar kbd_magic_prefix[] = "key_magic_";
  490. static uchar kbd_command_prefix[] = "key_cmd_";
  491. struct kbd_data_t {
  492. char s1;
  493. };
  494. struct kbd_data_t *get_keys(struct kbd_data_t *kbd_data)
  495. {
  496. /* read SW1 + SW2 */
  497. kbd_data->s1 = gpio_get_value(12) +
  498. (gpio_get_value(13) << 1);
  499. return kbd_data;
  500. }
  501. static int compare_magic(const struct kbd_data_t *kbd_data, char *str)
  502. {
  503. char s1 = str[0];
  504. if (s1 >= '0' && s1 <= '9')
  505. s1 -= '0';
  506. else if (s1 >= 'a' && s1 <= 'f')
  507. s1 = s1 - 'a' + 10;
  508. else if (s1 >= 'A' && s1 <= 'F')
  509. s1 = s1 - 'A' + 10;
  510. else
  511. return -1;
  512. if (s1 != kbd_data->s1)
  513. return -1;
  514. return 0;
  515. }
  516. static char *key_match(const struct kbd_data_t *kbd_data)
  517. {
  518. char magic[sizeof(kbd_magic_prefix) + 1];
  519. char *suffix;
  520. char *kbd_magic_keys;
  521. /*
  522. * The following string defines the characters that can be appended
  523. * to "key_magic" to form the names of environment variables that
  524. * hold "magic" key codes, i. e. such key codes that can cause
  525. * pre-boot actions. If the string is empty (""), then only
  526. * "key_magic" is checked (old behaviour); the string "125" causes
  527. * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
  528. */
  529. kbd_magic_keys = getenv("magic_keys");
  530. if (kbd_magic_keys == NULL)
  531. kbd_magic_keys = "";
  532. /*
  533. * loop over all magic keys;
  534. * use '\0' suffix in case of empty string
  535. */
  536. for (suffix = kbd_magic_keys; *suffix ||
  537. suffix == kbd_magic_keys; ++suffix) {
  538. sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
  539. if (compare_magic(kbd_data, getenv(magic)) == 0) {
  540. char cmd_name[sizeof(kbd_command_prefix) + 1];
  541. char *cmd;
  542. sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
  543. cmd = getenv(cmd_name);
  544. return cmd;
  545. }
  546. }
  547. return NULL;
  548. }
  549. #endif /* CONFIG_PREBOOT */
  550. int misc_init_r(void)
  551. {
  552. char *s, buf[32];
  553. #ifdef CONFIG_PREBOOT
  554. struct kbd_data_t kbd_data;
  555. /* Decode keys */
  556. char *str = strdup(key_match(get_keys(&kbd_data)));
  557. /* Set or delete definition */
  558. setenv("preboot", str);
  559. free(str);
  560. #endif /* CONFIG_PREBOOT */
  561. /* count all restarts, and save this in an environment var */
  562. s = getenv("restartcount");
  563. if (s)
  564. sprintf(buf, "%ld", simple_strtoul(s, NULL, 10) + 1);
  565. else
  566. strcpy(buf, "1");
  567. setenv("restartcount", buf);
  568. saveenv();
  569. #ifdef CONFIG_HW_WATCHDOG
  570. davinci_hw_watchdog_enable();
  571. #endif
  572. return 0;
  573. }
  574. struct cmc_led {
  575. char name[20];
  576. unsigned char bank;
  577. unsigned char gpio;
  578. };
  579. struct cmc_led led_table[] = {
  580. {"led1", 1, 15},
  581. {"led2", 0, 1},
  582. {"led3", 0, 2},
  583. {"led4", 0, 3},
  584. {"led5", 0, 4},
  585. {"led6", 0, 5},
  586. {"led7", 0, 6},
  587. {"led8", 0, 14},
  588. };
  589. static int cmc_get_led_state(struct cmc_led *led)
  590. {
  591. int value;
  592. int gpio = led->bank * 16 + led->gpio;
  593. value = gpio_get_value(gpio);
  594. return value;
  595. }
  596. static int cmc_set_led_state(struct cmc_led *led, int state)
  597. {
  598. int gpio = led->bank * 16 + led->gpio;
  599. gpio_set_value(gpio, state);
  600. return 0;
  601. }
  602. static int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  603. {
  604. struct cmc_led *led;
  605. int found = 0;
  606. int i = 0;
  607. int only_print = 0;
  608. int len = ARRAY_SIZE(led_table);
  609. if (argc < 2)
  610. return cmd_usage(cmdtp);
  611. if (argc < 3)
  612. only_print = 1;
  613. led = led_table;
  614. while ((!found) && (i < len)) {
  615. if (strcmp(argv[1], led->name) == 0) {
  616. found = 1;
  617. } else {
  618. led++;
  619. i++;
  620. }
  621. }
  622. if (!found)
  623. return cmd_usage(cmdtp);
  624. if (only_print) {
  625. if (cmc_get_led_state(led))
  626. printf("on\n");
  627. else
  628. printf("off\n");
  629. return 0;
  630. }
  631. if (strcmp(argv[2], "on") == 0)
  632. cmc_set_led_state(led, 1);
  633. else
  634. cmc_set_led_state(led, 0);
  635. return 0;
  636. }
  637. U_BOOT_CMD(led, 3, 1, do_led,
  638. "switch on/off board led",
  639. "[name] [on/off]"
  640. );
  641. #ifdef CONFIG_HW_WATCHDOG
  642. void hw_watchdog_reset(void)
  643. {
  644. davinci_hw_watchdog_reset();
  645. }
  646. #endif
  647. #if defined(CONFIG_POST)
  648. void arch_memory_failure_handle(void)
  649. {
  650. struct davinci_gpio *gpio = davinci_gpio_bank01;
  651. int state = 1;
  652. /*
  653. * if memor< failure blink with the LED 1,2 and 3
  654. * as we running from flash, we cannot use the gpio
  655. * api here, so access the gpio pin direct through
  656. * the gpio register.
  657. */
  658. while (1) {
  659. if (state) {
  660. clrbits_le32(&gpio->out_data, 0x80000006);
  661. state = 0;
  662. } else {
  663. setbits_le32(&gpio->out_data, 0x80000006);
  664. state = 1;
  665. }
  666. udelay(500);
  667. }
  668. }
  669. #endif
  670. ulong post_word_load(void)
  671. {
  672. struct davinci_rtc *reg =
  673. (struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
  674. return in_be32(&reg->scratch2);
  675. }
  676. void post_word_store(ulong value)
  677. {
  678. struct davinci_rtc *reg =
  679. (struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
  680. /*
  681. * write RTC kick register to enable write
  682. * for RTC Scratch registers. Cratch0 and 1 are
  683. * used for bootcount values.
  684. */
  685. writel(RTC_KICK0R_WE, &reg->kick0r);
  686. writel(RTC_KICK1R_WE, &reg->kick1r);
  687. out_be32(&reg->scratch2, value);
  688. }
  689. void board_gpio_init(void)
  690. {
  691. struct davinci_gpio *gpio = davinci_gpio_bank01;
  692. /*
  693. * set LED (gpio Interface not usable here)
  694. * set LED pins to output and state 0
  695. */
  696. clrbits_le32(&gpio->dir, 0x8000407e);
  697. clrbits_le32(&gpio->out_data, 0x8000407e);
  698. /* set LED 1 - 5 to state on */
  699. setbits_le32(&gpio->out_data, 0x8000001e);
  700. /*
  701. * set some gpio pins to low, this is needed early,
  702. * so we have no gpio Interface here
  703. * gpios:
  704. * 8[8] Mode PV select low
  705. * 8[9] Debug Rx Enable low
  706. * 8[10] Mode Select PV low
  707. * 8[11] Counter Interface RS485 Rx-Enable low
  708. */
  709. gpio = davinci_gpio_bank8;
  710. clrbits_le32(&gpio->dir, 0x00000f00);
  711. clrbits_le32(&gpio->out_data, 0x0f00);
  712. }
  713. int board_late_init(void)
  714. {
  715. cmc_set_led_state(&led_table[4], 0);
  716. return 0;
  717. }
  718. void show_boot_progress(int val)
  719. {
  720. switch (val) {
  721. case 1:
  722. cmc_set_led_state(&led_table[4], 1);
  723. break;
  724. case 4:
  725. cmc_set_led_state(&led_table[4], 0);
  726. break;
  727. case 15:
  728. cmc_set_led_state(&led_table[4], 1);
  729. break;
  730. }
  731. }
  732. #ifdef CONFIG_DAVINCI_MMC
  733. static struct davinci_mmc mmc_sd1 = {
  734. .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
  735. .input_clk = 228000000,
  736. .host_caps = MMC_MODE_4BIT,
  737. .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
  738. .version = MMC_CTLR_VERSION_2,
  739. };
  740. int board_mmc_init(bd_t *bis)
  741. {
  742. mmc_sd1.input_clk = clk_get(DAVINCI_MMC_CLKID);
  743. /* Add slot-0 to mmc subsystem */
  744. return davinci_mmc_init(bis, &mmc_sd1);
  745. }
  746. #endif