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phyus
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uboot-vybrid_public
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master
phyCORE-Vybrid-PD15.1-rc1
vphyCORE-Vybrid-PD15.1-rc1
Commit History
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Author
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Message
Date
Dave Liu
22cca7e1cd
fsl-ddr: make the self refresh idle threshold configurable
16 years ago
Dave Liu
22ff3d0134
fsl-ddr: clean up the ddr code for DDR3 controller
16 years ago
Haiying Wang
dbbbb3abef
Make DDR interleaving mode work correctly
16 years ago
Kumar Gala
58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
16 years ago