 Roy Zang
|
ae026ffd1e
fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
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%!s(int64=14) %!d(string=hai) anos |
 Kumar Gala
|
a09b9b68d4
powerpc/8xxx: Refactor SRIO initialization into common code
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%!s(int64=14) %!d(string=hai) anos |
|
Kumar Gala
|
35079aa98c
powerpc/85xx: Replace CONFIG_SYS_HAS_SERDES with a weak function
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%!s(int64=14) %!d(string=hai) anos |
 Haiying Wang
|
888279b5ed
powerpc/85xx: do not reloc l2srbar if CONFIG_FLASH_BASE is not defined
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%!s(int64=14) %!d(string=hai) anos |
 Kim Phillips
|
680c613a5c
powerpc/8xxx: share PIC defines among 85xx and 86xx
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%!s(int64=14) %!d(string=hai) anos |
|
Kumar Gala
|
fd3c9befa8
powerpc/p4080: Add workaround for erratum CPU22
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%!s(int64=15) %!d(string=hai) anos |
|
Kumar Gala
|
6aba33e939
powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
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%!s(int64=16) %!d(string=hai) anos |
|
Kumar Gala
|
af0250652a
powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support
|
%!s(int64=15) %!d(string=hai) anos |
 Becky Bruce
|
f51cdaf191
83xx/85xx/86xx: LBC register cleanup
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%!s(int64=15) %!d(string=hai) anos |
|
Kumar Gala
|
f54fe87ace
85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabled
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%!s(int64=15) %!d(string=hai) anos |
 Lan Chunhe
|
3f0202ed13
mpc85xx: Add the ability to set LCRR[CLKDIV] to improve R/W speed of flash
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%!s(int64=15) %!d(string=hai) anos |
|
Kumar Gala
|
4db9708b94
85xx: Convert cpu_init_f code to use out_be32 for LBC registers
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%!s(int64=15) %!d(string=hai) anos |
 Stefan Roese
|
a47a12becf
Move arch/ppc to arch/powerpc
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%!s(int64=15) %!d(string=hai) anos |
