Historique des commits

Auteur SHA1 Message Date
  Poonam Aggrwal d3bee08332 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz il y a 15 ans
  Poonam Aggrwal 273a28ad9e 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate il y a 15 ans
  Poonam Aggrwal 924024c396 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB. il y a 15 ans
  Poonam Aggrwal 82b7725b6d ppc/85xx: 32bit DDR changes for P1020/P1011 il y a 15 ans
  Kumar Gala 2abbd31da6 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist il y a 15 ans
  Poonam Aggrwal 728ece343e 85xx: Add support for P2020RDB board il y a 15 ans