 Kumar Gala
|
e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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%!s(int64=16) %!d(string=hai) anos |
 Dave Liu
|
c360ceac02
fsl-ddr: add the DDR3 SPD infrastructure
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%!s(int64=16) %!d(string=hai) anos |
|
Dave Liu
|
6a81978367
fsl-ddr: Fix two bugs in the ddr infrastructure
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%!s(int64=16) %!d(string=hai) anos |
|
Dave Liu
|
22cca7e1cd
fsl-ddr: make the self refresh idle threshold configurable
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%!s(int64=16) %!d(string=hai) anos |
|
Dave Liu
|
22ff3d0134
fsl-ddr: clean up the ddr code for DDR3 controller
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%!s(int64=16) %!d(string=hai) anos |
|
Dave Liu
|
80ee3ce6d7
fsl-ddr: update the bit mask for DDR3 controller
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%!s(int64=16) %!d(string=hai) anos |
 Haiying Wang
|
1f293b417a
Add debug information for DDR controller registers
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%!s(int64=16) %!d(string=hai) anos |
|
Haiying Wang
|
dbbbb3abef
Make DDR interleaving mode work correctly
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%!s(int64=16) %!d(string=hai) anos |
|
Kumar Gala
|
302e52e0b1
Fix compiler warning in mpc8xxx ddr code
|
%!s(int64=16) %!d(string=hai) anos |
|
Kumar Gala
|
58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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%!s(int64=16) %!d(string=hai) anos |
