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uboot-vybrid_public
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15e2697c9f
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master
phyCORE-Vybrid-PD15.1-rc1
vphyCORE-Vybrid-PD15.1-rc1
Commit History
zoek
Auteur
SHA1
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Datum
Ed Swarthout
7008d26a40
fsl ddr skip interleaving if not supported.
16 jaren geleden
Haiying Wang
c9ffd839b1
Check DDR interleaving mode
16 jaren geleden
Haiying Wang
dfb49108e4
Pass dimm parameters to populate populate controller options
16 jaren geleden
Kumar Gala
58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
16 jaren geleden