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@@ -23,7 +23,9 @@
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*/
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#include <common.h>
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+#include <spi.h>
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#include <asm/io.h>
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+#include <asm/gpio.h>
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#include <asm/arch/adc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc.h>
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@@ -52,24 +54,6 @@ static int get_hwrev(void)
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static void check_hw_revision(void);
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-int board_init(void)
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-{
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- gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
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- gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
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-
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- gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
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- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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-
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-#if defined(CONFIG_PMIC)
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- pmic_init();
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-#endif
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-
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- check_hw_revision();
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- printf("HW Revision:\t0x%x\n", board_rev);
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-
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- return 0;
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-}
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-
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
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@@ -284,3 +268,70 @@ int board_early_init_f(void)
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return 0;
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}
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+
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+#ifdef CONFIG_SOFT_SPI
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+static void soft_spi_init(void)
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+{
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+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
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+ CONFIG_SOFT_SPI_MODE & SPI_CPOL);
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+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
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+ gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
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+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
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+ !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
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+}
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+
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+void spi_cs_activate(struct spi_slave *slave)
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+{
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+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
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+ !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
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+ SPI_SCL(1);
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+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
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+ CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
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+}
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+
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+void spi_cs_deactivate(struct spi_slave *slave)
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+{
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+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
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+ !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
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+}
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+
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+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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+{
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+ return bus == 0 && cs == 0;
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+}
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+
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+void universal_spi_scl(int bit)
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+{
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+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
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+}
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+
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+void universal_spi_sda(int bit)
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+{
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+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
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+}
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+
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+int universal_spi_read(void)
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+{
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+ return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
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+}
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+#endif
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+
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+int board_init(void)
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+{
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+ gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
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+ gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
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+
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+ gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
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+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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+
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+#if defined(CONFIG_PMIC)
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+ pmic_init();
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+#endif
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+#ifdef CONFIG_SOFT_SPI
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+ soft_spi_init();
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+#endif
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+ check_hw_revision();
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+ printf("HW Revision:\t0x%x\n", board_rev);
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+
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+ return 0;
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+}
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