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@@ -11,7 +11,7 @@
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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@@ -35,35 +35,35 @@
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* (easy to change)
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*/
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-#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
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-#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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-#define CONFIG_V38B 1 /* ... on V38B board */
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-#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
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+#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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+#define CONFIG_V38B 1 /* ... on V38B board */
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+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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-#define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */
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-#define CONFIG_MPC5200_DDR 1 /* has DDR SDRAM */
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-#define CONFIG_HW_WATCHDOG 1 /* has watchdog */
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+#define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */
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+#define CONFIG_MPC5200_DDR 1 /* has DDR SDRAM */
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+#define CONFIG_HW_WATCHDOG 1 /* has watchdog */
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#define CONFIG_NETCONSOLE 1
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-#define CONFIG_BOARD_EARLY_INIT_R 1 /* make flash read/write */
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+#define CONFIG_BOARD_EARLY_INIT_R 1 /* make flash read/write */
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-#define CFG_XLB_PIPELINING 1 /* gives better performance */
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+#define CFG_XLB_PIPELINING 1 /* gives better performance */
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-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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-#define BOOTFLAG_WARM 0x02 /* Software reboot */
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+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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+#define BOOTFLAG_WARM 0x02 /* Software reboot */
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-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
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+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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#endif
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/*
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* Serial console configuration
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*/
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-#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
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-#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
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+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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@@ -97,12 +97,12 @@
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#define CONFIG_USB_OHCI
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#define CONFIG_USB_STORAGE
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-#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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/*
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* Supported commands
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*/
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-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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CFG_CMD_FAT | \
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CFG_CMD_I2C | \
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CFG_CMD_IDE | \
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@@ -112,7 +112,7 @@
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CFG_CMD_IRQ | \
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CFG_CMD_JFFS2 | \
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CFG_CMD_MII | \
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- CFG_CMD_SDRAMi | \
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+ CFG_CMD_SDRAMi | \
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CFG_CMD_DATE | \
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CFG_CMD_USB | \
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CFG_CMD_FAT)
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@@ -123,7 +123,7 @@
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/*
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* Boot low with 16 MB Flash
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*/
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-# define CFG_LOWBOOT 1
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+# define CFG_LOWBOOT 1
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# define CFG_LOWBOOT16 1
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/*
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@@ -131,35 +131,35 @@
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*/
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#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
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-#define CONFIG_PREBOOT "echo;" \
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+#define CONFIG_PREBOOT "echo;" \
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"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
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"echo"
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#undef CONFIG_BOOTARGS
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-#define CONFIG_EXTRA_ENV_SETTINGS \
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- "netdev=eth0\0" \
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- "devno=5\0" \
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- "hostname=V38B_$(devno)\0" \
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- "ipaddr=10.100.99.$(devno)\0" \
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- "netmask=255.255.0.0\0" \
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- "serverip=10.100.10.90\0" \
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- "gatewayip=10.100.254.254\0" \
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- "ramargs=setenv bootargs root=/dev/ram rw\0" \
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- "rootpath=/opt/eldk/ppc_6xx\0" \
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- "bootfile=mpc5200/uImage\0" \
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- "bootcmd=run net_nfs\0" \
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- "addip=setenv bootargs $(bootargs) " \
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- "ip=$(ipaddr):$(serverip):$(gatewayip):" \
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- "$(netmask):$(hostname):$(netdev):off panic=1\0" \
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- "flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \
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- "flash_self=run ramargs addip;bootm $(kernel_addr) " \
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- "$(ramdisk_addr)\0" \
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- "net_nfs=tftp 200000 $(bootfile);run nfsargs " \
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- "addip;bootm\0" \
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- "nfsargs=setenv bootargs root=/dev/nfs rw " \
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- "nfsroot=$(serverip):$(rootpath)\0" \
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- ""
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+#define CONFIG_EXTRA_ENV_SETTINGS \
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+ "netdev=eth0\0" \
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+ "devno=5\0" \
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+ "hostname=V38B_$(devno)\0" \
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+ "ipaddr=10.100.99.$(devno)\0" \
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+ "netmask=255.255.0.0\0" \
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+ "serverip=10.100.10.90\0" \
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+ "gatewayip=10.100.254.254\0" \
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+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
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+ "rootpath=/opt/eldk/ppc_6xx\0" \
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+ "bootfile=mpc5200/uImage\0" \
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+ "bootcmd=run net_nfs\0" \
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+ "addip=setenv bootargs $(bootargs) " \
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+ "ip=$(ipaddr):$(serverip):$(gatewayip):" \
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+ "$(netmask):$(hostname):$(netdev):off panic=1\0" \
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+ "flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \
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+ "flash_self=run ramargs addip;bootm $(kernel_addr) " \
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+ "$(ramdisk_addr)\0" \
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+ "net_nfs=tftp 200000 $(bootfile);run nfsargs " \
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+ "addip;bootm\0" \
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+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
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+ "nfsroot=$(serverip):$(rootpath)\0" \
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+ ""
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#define CONFIG_BOOTCOMMAND "run net_nfs"
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@@ -196,13 +196,13 @@
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*/
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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-#define CFG_FLASH_CFI_AMD_RESET 1
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+#define CFG_FLASH_CFI_AMD_RESET 1
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#define CFG_FLASH_BASE 0xFF000000
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#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH_SIZE 0x01000000 /* 16 MiB */
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#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
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-#define CFG_FLASH_USE_BUFFER_WRITE 1 /* flash write speed-up */
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+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* flash write speed-up */
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/*
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* Environment settings
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@@ -243,7 +243,7 @@
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*/
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#define CONFIG_MPC5xxx_FEC 1
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#define CONFIG_PHY_ADDR 0x00
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-#define CONFIG_MII 1
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+#define CONFIG_MII 1
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/*
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* GPIO configuration
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@@ -307,12 +307,12 @@
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*-----------------------------------------------------------------------
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*/
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-#undef CONFIG_IDE_8xx_PCCARD /* Don't use IDE with PC Card Adapter */
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+#undef CONFIG_IDE_8xx_PCCARD /* Don't use IDE with PC Card Adapter */
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-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
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-#undef CONFIG_IDE_LED /* LED for ide not supported */
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+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
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+#undef CONFIG_IDE_LED /* LED for ide not supported */
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-#define CONFIG_IDE_RESET /* reset for ide supported */
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+#define CONFIG_IDE_RESET /* reset for ide supported */
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#define CONFIG_IDE_PREINIT
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#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
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@@ -331,13 +331,13 @@
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/* Offset for alternate registers */
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#define CFG_ATA_ALT_OFFSET (0x005C)
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-/* Interval between registers */
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-#define CFG_ATA_STRIDE 4
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+/* Interval between registers */
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+#define CFG_ATA_STRIDE 4
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-/* Status LED */
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+/* Status LED */
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-#define CONFIG_STATUS_LED /* Status LED enabled */
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-#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
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+#define CONFIG_STATUS_LED /* Status LED enabled */
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+#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
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#define CFG_LED_BASE (0xf0000600 + 0x70) /* Timer 7 GPIO */
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Wolfgang Denk