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@@ -21,6 +21,7 @@
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#include <common.h>
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#include <common.h>
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#include <malloc.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi.h>
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+#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#ifdef CONFIG_MX27
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#ifdef CONFIG_MX27
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@@ -32,6 +33,8 @@
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#else
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#else
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+#include <asm/arch/mx31.h>
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+
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#define MXC_CSPIRXDATA 0x00
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#define MXC_CSPIRXDATA 0x00
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#define MXC_CSPITXDATA 0x04
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#define MXC_CSPITXDATA 0x04
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#define MXC_CSPICTRL 0x08
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#define MXC_CSPICTRL 0x08
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@@ -68,6 +71,7 @@ struct mxc_spi_slave {
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struct spi_slave slave;
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struct spi_slave slave;
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unsigned long base;
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unsigned long base;
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u32 ctrl_reg;
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u32 ctrl_reg;
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+ int gpio;
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};
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};
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static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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@@ -85,7 +89,8 @@ static inline void reg_write(unsigned long addr, u32 val)
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*(volatile unsigned long*)addr = val;
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*(volatile unsigned long*)addr = val;
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}
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}
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-static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
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+static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen,
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+ unsigned long flags)
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{
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{
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struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
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unsigned int cfg_reg = reg_read(mxcs->base + MXC_CSPICTRL);
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unsigned int cfg_reg = reg_read(mxcs->base + MXC_CSPICTRL);
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@@ -96,6 +101,9 @@ static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
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if (cfg_reg != mxcs->ctrl_reg)
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if (cfg_reg != mxcs->ctrl_reg)
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reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg);
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reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg);
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+ if (mxcs->gpio > 0 && (flags & SPI_XFER_BEGIN))
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+ mx31_gpio_set(mxcs->gpio, mxcs->ctrl_reg & MXC_CSPICTRL_SSPOL);
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+
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reg_write(mxcs->base + MXC_CSPITXDATA, data);
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reg_write(mxcs->base + MXC_CSPITXDATA, data);
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reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg | MXC_CSPICTRL_XCH);
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reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg | MXC_CSPICTRL_XCH);
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@@ -103,6 +111,11 @@ static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
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while (reg_read(mxcs->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
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while (reg_read(mxcs->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
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;
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;
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+ if (mxcs->gpio > 0 && (flags & SPI_XFER_END)) {
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+ mx31_gpio_set(mxcs->gpio,
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+ !(mxcs->ctrl_reg & MXC_CSPICTRL_SSPOL));
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+ }
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+
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return reg_read(mxcs->base + MXC_CSPIRXDATA);
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return reg_read(mxcs->base + MXC_CSPIRXDATA);
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}
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}
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@@ -121,7 +134,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout;
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for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout;
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i < n_blks;
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i < n_blks;
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i++, in_l++, out_l++, bitlen -= 32) {
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i++, in_l++, out_l++, bitlen -= 32) {
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- u32 data = spi_xchg_single(slave, *out_l, bitlen);
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+ u32 data = spi_xchg_single(slave, *out_l, bitlen, flags);
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/* Check if we're only transfering 8 or 16 bits */
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/* Check if we're only transfering 8 or 16 bits */
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if (!i) {
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if (!i) {
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@@ -139,15 +152,54 @@ void spi_init(void)
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{
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{
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}
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}
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+static int decode_cs(struct mxc_spi_slave *mxcs, unsigned int cs)
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+{
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+ int ret;
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+
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+ /*
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+ * Some SPI devices require active chip-select over multiple
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+ * transactions, we achieve this using a GPIO. Still, the SPI
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+ * controller has to be configured to use one of its own chipselects.
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+ * To use this feature you have to call spi_setup_slave() with
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+ * cs = internal_cs | (gpio << 8), and you have to use some unused
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+ * on this SPI controller cs between 0 and 3.
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+ */
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+ if (cs > 3) {
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+ mxcs->gpio = cs >> 8;
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+ cs &= 3;
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+ ret = mx31_gpio_direction(mxcs->gpio, MX31_GPIO_DIRECTION_OUT);
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+ if (ret) {
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+ printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio);
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+ return -EINVAL;
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+ }
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+ } else {
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+ mxcs->gpio = -1;
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+ }
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+
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+ return cs;
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+}
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+
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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unsigned int max_hz, unsigned int mode)
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{
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{
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unsigned int ctrl_reg;
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unsigned int ctrl_reg;
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struct mxc_spi_slave *mxcs;
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struct mxc_spi_slave *mxcs;
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+ int ret;
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+
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+ if (bus >= ARRAY_SIZE(spi_bases))
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+ return NULL;
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+
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+ mxcs = malloc(sizeof(struct mxc_spi_slave));
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+ if (!mxcs)
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+ return NULL;
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- if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
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- cs > 3)
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+ ret = decode_cs(mxcs, cs);
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+ if (ret < 0) {
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+ free(mxcs);
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return NULL;
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return NULL;
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+ }
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+
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+ cs = ret;
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ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
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ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
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MXC_CSPICTRL_BITCOUNT(31) |
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MXC_CSPICTRL_BITCOUNT(31) |
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@@ -162,10 +214,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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if (mode & SPI_CS_HIGH)
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if (mode & SPI_CS_HIGH)
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ctrl_reg |= MXC_CSPICTRL_SSPOL;
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ctrl_reg |= MXC_CSPICTRL_SSPOL;
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- mxcs = malloc(sizeof(struct mxc_spi_slave));
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- if (!mxcs)
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- return NULL;
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-
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mxcs->slave.bus = bus;
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mxcs->slave.bus = bus;
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mxcs->slave.cs = cs;
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mxcs->slave.cs = cs;
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mxcs->base = spi_bases[bus];
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mxcs->base = spi_bases[bus];
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