|
@@ -220,6 +220,7 @@
|
|
|
#define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */
|
|
|
#define PHYS_FLASH_SIZE_2 SZ_32M
|
|
|
|
|
|
+#define PHYS_SRAM 0x4020F800
|
|
|
/*-----------------------------------------------------------------------
|
|
|
* FLASH and environment organization
|
|
|
*/
|
|
@@ -271,4 +272,7 @@
|
|
|
#define MTDPARTS_DEFAULT "mtdparts=omap2420-1:-(jffs2)"
|
|
|
*/
|
|
|
|
|
|
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
|
|
+#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
|
|
|
+
|
|
|
#endif /* __CONFIG_H */
|