Merge branch 'master' of git://git.denx.de/u-boot-sh

Makefile

@@ -3205,7 +3205,7 @@ mimc200_config		:	unconfig
 rsk7203_config: unconfig
 	@ >include/config.h
 	@echo "#define CONFIG_RSK7203 1" >> include/config.h
-	@./mkconfig -a $(@:_config=) sh sh2 rsk7203 renesas
+	@$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas
 
 #########################################################################
 ## sh3 (Renesas SuperH)
@@ -3228,7 +3228,7 @@ ms7720se_config: unconfig
 MigoR_config :       unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
-	@./mkconfig -a $(@:_config=) sh sh4 MigoR renesas
+	@$(MKCONFIG) -a $(@:_config=) sh sh4 MigoR renesas
 
 ms7750se_config: unconfig
 	@mkdir -p $(obj)include

board/renesas/MigoR/lowlevel_init.S

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007
+ * Copyright (C) 2007-2008
  * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  *
  * Copyright (C) 2007
@@ -211,25 +211,25 @@ PFC_PULCR_D:	.long	0x6000
 PFC_DRVCR_D:	.long	0x0464
 FRQCR_D:	.long	0x07033639
 PLLCR_D:	.long	0x00005000
-DLLFRQ_D:	.long	0x000004F6	! 20080115
+DLLFRQ_D:	.long	0x000004F6
 
 CMNCR_A:	.long	CMNCR
-CMNCR_D:	.long	0x0000001B	! 20080115
-CS0BCR_A:	.long	CS0BCR		! Flash bank 1
+CMNCR_D:	.long	0x0000001B
+CS0BCR_A:	.long	CS0BCR
 CS0BCR_D:	.long	0x24920400
-CS4BCR_A:	.long	CS4BCR		!
-CS4BCR_D:	.long	0x10003400	! 20080115
-CS5ABCR_A:	.long	CS5ABCR		!
+CS4BCR_A:	.long	CS4BCR
+CS4BCR_D:	.long	0x00003400
+CS5ABCR_A:	.long	CS5ABCR
 CS5ABCR_D:	.long	0x24920400
-CS5BBCR_A:	.long	CS5BBCR		!
+CS5BBCR_A:	.long	CS5BBCR
 CS5BBCR_D:	.long	0x24920400
-CS6ABCR_A:	.long	CS6ABCR		!
+CS6ABCR_A:	.long	CS6ABCR
 CS6ABCR_D:	.long	0x24920400
 
 CS0WCR_A:	.long	CS0WCR
 CS0WCR_D:	.long	0x00000380
 CS4WCR_A:	.long	CS4WCR
-CS4WCR_D:	.long	0x00100A81	! 20080115
+CS4WCR_D:	.long	0x00110080
 CS5AWCR_A:	.long	CS5AWCR
 CS5AWCR_D:	.long	0x00000300
 CS5BWCR_A:	.long	CS5BWCR
@@ -238,20 +238,20 @@ CS6AWCR_A:	.long	CS6AWCR
 CS6AWCR_D:	.long	0x00000300
 
 SDCR_A:		.long	SBSC_SDCR
-SDCR_D:		.long	0x80160809	! 20080115
+SDCR_D:		.long	0x80160809
 SDWCR_A:	.long	SBSC_SDWCR
-SDWCR_D:	.long	0x0014450C	! 20080115
+SDWCR_D:	.long	0x0014450C
 SDPCR_A:	.long	SBSC_SDPCR
 SDPCR_D:	.long	0x00000087
 RTCOR_A:	.long	SBSC_RTCOR
 RTCNT_A:	.long	SBSC_RTCNT
 RTCNT_D:	.long	0xA55A0012
-RTCOR_D:	.long	0xA55A001C	! 20080115
+RTCOR_D:	.long	0xA55A001C
 RTCSR_A:	.long	SBSC_RTCSR
 RFCR_A:		.long	SBSC_RFCR
 RFCR_D:		.long	0xA55A0221
-RTCSR_D:	.long	0xA55A009a	! 20080115
-SDMR3_A:	.long	0xFE581180	! 20080115
+RTCSR_D:	.long	0xA55A009a
+SDMR3_A:	.long	0xFE581180
 
 SR_MASK_D:	.long	0xEFFFFF0F
 
@@ -260,5 +260,5 @@ SR_MASK_D:	.long	0xEFFFFF0F
 SBSCR_D:	.word	0x0044
 PSCR_D:		.word	0x0000
 RWTCSR_D_1:	.word	0xA507
-RWTCSR_D_2:	.word	0xA504		! 20080115
+RWTCSR_D_2:	.word	0xA504
 RWTCNT_D:	.word	0x5A00

board/renesas/r2dplus/lowlevel_init.S

@@ -11,7 +11,7 @@
 
 	.global lowlevel_init
 	.text
-	.align  2
+	.align	2
 
 lowlevel_init:
 
@@ -21,7 +21,7 @@ lowlevel_init:
 
 	mov.l	MMUCR_A,r1
 	mov.l	MMUCR_D,r0
-	mov.w	r0,@r1
+	mov.l	r0,@r1
 
 	mov.l	BCR1_A,r1
 	mov.l	BCR1_D,r0
@@ -118,34 +118,34 @@ CCR_D_E:	.long	0x8000090B
 
 FRQCR_A:	.long	FRQCR		/* FRQCR Address */
 FRQCR_D:	.long	0x00000e0a	/* 03/07/15 modify */
-BCR1_A:	.long	BCR1		/* BCR1 Address */
-BCR1_D:	.long	0x00180008
-BCR2_A:	.long	BCR2		/* BCR2 Address */
-BCR2_D:	.long   0xabe8
-BCR3_A:	.long	BCR3		/* BCR3 Address */
-BCR3_D:	.long	0x0000
-BCR4_A:	.long	BCR4		/* BCR4 Address */
-BCR4_D:	.long	0x00000010
-WCR1_A:	.long	WCR1		/* WCR1 Address */
-WCR1_D:	.long	0x33343333
-WCR2_A:	.long	WCR2		/* WCR2 Address */
-WCR2_D:	.long	0xcff86fbf
-WCR3_A:	.long	WCR3		/* WCR3 Address */
-WCR3_D:	.long	0x07777707
+BCR1_A:		.long	BCR1		/* BCR1 Address */
+BCR1_D:		.long	0x00180008
+BCR2_A:		.long	BCR2		/* BCR2 Address */
+BCR2_D:		.long	0xabe8
+BCR3_A:		.long	BCR3		/* BCR3 Address */
+BCR3_D:		.long	0x0000
+BCR4_A:		.long	BCR4		/* BCR4 Address */
+BCR4_D:		.long	0x00000010
+WCR1_A:		.long	WCR1		/* WCR1 Address */
+WCR1_D:		.long	0x33343333
+WCR2_A:		.long	WCR2		/* WCR2 Address */
+WCR2_D:		.long	0xcff86fbf
+WCR3_A:		.long	WCR3		/* WCR3 Address */
+WCR3_D:		.long	0x07777707
 LED_A:		.long	0x04000036	/* LED Address */
 RTCNT_A:	.long	RTCNT		/* RTCNT Address */
 RTCNT_D:	.long	0xA500		/* RTCNT Write Code A5h Data 00h */
 RTCOR_A:	.long	RTCOR		/* RTCOR Address */
-RTCOR_D:	.long	0xA534		/* RTCOR Write Code  */
+RTCOR_D:	.long	0xA534		/* RTCOR Write Code */
 RTCSR_A:	.long	RTCSR		/* RTCSR Address */
 RTCSR_D:	.long	0xA510		/* RTCSR Write Code */
-SDMR3_A:	.long   0xFF9400CC	/* SDMR3 Address */
+SDMR3_A:	.long	0xFF9400CC	/* SDMR3 Address */
 SDMR3_D:	.long	0x55
 MCR_A:		.long	MCR		/* MCR Address */
-MCR_D1:	.long	0x081901F4	/* MRSET:'0' */
-MCR_D2:	.long	0x481901F4	/* MRSET:'1' */
-RFCR_A:	.long	RFCR		/* RFCR Address */
-RFCR_D:	.long	0xA400		/* RFCR Write Code A4h Data 00h */
+MCR_D1:		.long	0x081901F4	/* MRSET:'0' */
+MCR_D2:		.long	0x481901F4	/* MRSET:'1' */
+RFCR_A:		.long	RFCR		/* RFCR Address */
+RFCR_D:		.long	0xA400		/* RFCR Write Code A4h Data 00h */
 PCR_A:		.long	PCR		/* PCR Address */
 PCR_D:		.long	0x0000
 MMUCR_A:	.long	MMUCR		/* MMUCCR Address */

cpu/sh2/Makefile

@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
-OBJS	= cpu.o interrupts.o watchdog.o time.o # cache.o
+OBJS	= cpu.o interrupts.o watchdog.o
 
 all:	.depend $(START) $(LIB)
 

cpu/sh3/Makefile

@@ -32,7 +32,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 SOBJS	= start.o
-COBJS	= cpu.o interrupts.o watchdog.o time.o cache.o
+COBJS	= cpu.o interrupts.o watchdog.o cache.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

cpu/sh3/time.c

@@ -1,103 +0,0 @@
-/*
- * (C) Copyright 2007
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * (C) Copyright 2007
- * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-
-#define TMU_MAX_COUNTER (~0UL)
-
-static void tmu_timer_start(unsigned int timer)
-{
-	if (timer > 2)
-		return;
-
-	outb(inb(TSTR) | (1 << timer), TSTR);
-}
-
-static void tmu_timer_stop(unsigned int timer)
-{
-	u8 val = inb(TSTR);
-
-	if (timer > 2)
-		return;
-	outb(val & ~(1 << timer), TSTR);
-}
-
-int timer_init(void)
-{
-	/* Divide clock by 4 */
-	outw(0, TCR0);
-
-	tmu_timer_stop(0);
-	tmu_timer_start(0);
-	return 0;
-}
-
-/*
-   In theory we should return a true 64bit value (ie something that doesn't
-   overflow). However, we don't. Therefore if TMU runs at fastest rate of
-   6.75 MHz this value will wrap after u-boot has been running for approx
-   10 minutes.
-*/
-unsigned long long get_ticks(void)
-{
-	return (0 - inl(TCNT0));
-}
-
-unsigned long get_timer(unsigned long base)
-{
-	return ((0 - inl(TCNT0)) - base);
-}
-
-void set_timer(unsigned long t)
-{
-	outl(0 - t, TCNT0);
-}
-
-void reset_timer(void)
-{
-	tmu_timer_stop(0);
-	set_timer(0);
-	tmu_timer_start(0);
-}
-
-void udelay(unsigned long usec)
-{
-	unsigned int start = get_timer(0);
-	unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
-
-	while (get_timer(0) < end)
-		continue;
-}
-
-unsigned long get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}

cpu/sh4/Makefile

@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 SOBJS	= start.o
-COBJS	= cpu.o interrupts.o watchdog.o time.o cache.o
+COBJS	= cpu.o interrupts.o watchdog.o cache.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

cpu/sh4/time.c

@@ -1,98 +0,0 @@
-/*
- * (C) Copyright 2007
- * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#define TMU_MAX_COUNTER (~0UL)
-
-static void tmu_timer_start (unsigned int timer)
-{
-	if (timer > 2)
-		return;
-
-	*((volatile unsigned char *) TSTR) |= (1 << timer);
-}
-
-static void tmu_timer_stop (unsigned int timer)
-{
-	u8 val = *((volatile u8 *)TSTR);
-	if (timer > 2)
-		return;
-	*((volatile unsigned char *)TSTR) = val &~(1 << timer);
-}
-
-int timer_init (void)
-{
-	/* Divide clock by 4 */
-	*(volatile u16 *)TCR0 = 0;
-
-	tmu_timer_stop(0);
-	tmu_timer_start(0);
-	return 0;
-}
-
-/*
-   In theory we should return a true 64bit value (ie something that doesn't
-   overflow). However, we don't. Therefore if TMU runs at fastest rate of
-   6.75 MHz this value will wrap after u-boot has been running for approx
-   10 minutes.
-*/
-unsigned long long get_ticks (void)
-{
-	return (0 - *((volatile u32 *) TCNT0));
-}
-
-unsigned long get_timer (unsigned long base)
-{
-	return ((0 - *((volatile u32 *) TCNT0)) - base);
-}
-
-void set_timer (unsigned long t)
-{
-	*((volatile unsigned int *) TCNT0) = (0 - t);
-}
-
-void reset_timer (void)
-{
-	tmu_timer_stop(0);
-	set_timer (0);
-	tmu_timer_start(0);
-}
-
-void udelay (unsigned long usec)
-{
-	unsigned int start = get_timer (0);
-	unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
-
-	while (get_timer (0) < end)
-		continue;
-}
-
-unsigned long get_tbclk (void)
-{
-	return CONFIG_SYS_HZ;
-}

drivers/pci/pci_sh7751.c

@@ -187,8 +187,8 @@ int pci_sh7751_init(struct pci_controller *hose)
 
 	/* Copy BSC registers into PCI BSC */
 	p4_out(inl(SH7751_BCR1), SH7751_PCIBCR1);
-	p4_out(inl(SH7751_BCR2), SH7751_PCIBCR2);
-	p4_out(inl(SH7751_BCR3), SH7751_PCIBCR3);
+	p4_out(inw(SH7751_BCR2), SH7751_PCIBCR2);
+	p4_out(inw(SH7751_BCR3), SH7751_PCIBCR3);
 	p4_out(inl(SH7751_WCR1), SH7751_PCIWCR1);
 	p4_out(inl(SH7751_WCR2), SH7751_PCIWCR2);
 	p4_out(inl(SH7751_WCR3), SH7751_PCIWCR3);

drivers/serial/serial_sh.c

@@ -94,7 +94,7 @@
 # define LSR_ORER	1
 # define FIFOLEVEL_MASK	0x1F
 #elif defined(CONFIG_CPU_SH7720)
-# define SCLSR		(vu_short *)(SCIF_BASE + 0x24)
+# define SCLSR		SCFSR
 # define LSR_ORER	0x0200
 # define FIFOLEVEL_MASK	0x1F
 #elif defined(CONFIG_CPU_SH7710) || \

include/asm-sh/cpu_sh4.h

@@ -26,8 +26,15 @@
 #define CCR_CACHE_ICI    0x00000800
 
 #define CACHE_OC_ADDRESS_ARRAY	0xf4000000
+
+#if defined (CONFIG_CPU_SH7750) || \
+	defined(CONFIG_CPU_SH7751)
 #define CACHE_OC_WAY_SHIFT	14
 #define CACHE_OC_NUM_ENTRIES	512
+#else
+#define CACHE_OC_WAY_SHIFT	13
+#define CACHE_OC_NUM_ENTRIES	256
+#endif
 #define CACHE_OC_ENTRY_SHIFT	5
 
 #if defined (CONFIG_CPU_SH7750) || \

include/configs/ms7722se.h

@@ -31,10 +31,13 @@
 #define CONFIG_MS7722SE		1
 
 #define CONFIG_CMD_FLASH
+#define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_ENV
 
 #define CONFIG_BAUDRATE		115200

lib_sh/Makefile

@@ -26,7 +26,11 @@ SOBJS-y	+=
 
 COBJS-y	+= board.o
 COBJS-y	+= bootm.o
-# COBJS-y	+= time.o
+ifeq ($(CONFIG_SH2),y)
+COBJS-y	+= time_sh2.o
+else
+COBJS-y	+= time.o
+endif
 
 SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))

lib_sh/time.c

@@ -1,6 +1,9 @@
 /*
- * Copyright (c) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * (C) Copyright 2007-2008
+ * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,50 +26,96 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
+
+#define TMU_MAX_COUNTER (~0UL)
+static int clk_adj = 1;
 
 static void tmu_timer_start (unsigned int timer)
 {
 	if (timer > 2)
 		return;
+	writeb(readb(TSTR) | (1 << timer), TSTR);
+}
 
-	*((volatile unsigned char *) TSTR0) |= (1 << timer);
+static void tmu_timer_stop (unsigned int timer)
+{
+	if (timer > 2)
+		return;
+	writeb(readb(TSTR) & ~(1 << timer), TSTR);
 }
 
 int timer_init (void)
 {
-	*(volatile u16 *)TCR0 = 0;
+	/* Divide clock by TMU_CLK_DIVIDER */
+	u16 bit = 0;
+	switch( TMU_CLK_DIVIDER ){
+	case 4:
+		bit = 0;
+		break;
+	case 16:
+		bit = 1;
+		break;
+	case 64: bit = 2;
+		break;
+	case 256:
+		bit = 3;
+		break;
+	case 1024:
+		bit = 4;
+		break;
+	default:
+		bit = 0;
+		break;
+	}
+	writew(readw(TCR0) | bit, TCR0);
+
+	/* Clock adjustment calc */
+	clk_adj = (int)(1.0/((1.0/CONFIG_SYS_HZ)*1000000));
+	if (clk_adj < 1)
+		clk_adj = 1;
+
+	tmu_timer_stop(0);
+	tmu_timer_start(0);
 
-	tmu_timer_start (0);
 	return 0;
 }
 
 unsigned long long get_ticks (void)
 {
-	return (0 - *((volatile unsigned int *) TCNT0));
+	return 0 - readl(TCNT0);
 }
 
-unsigned long get_timer (unsigned long base)
+static unsigned long get_usec (void)
 {
-	return ((0 - *((volatile unsigned int *) TCNT0)) - base);
+	return (0 - readl(TCNT0));
 }
 
-void set_timer (unsigned long t)
+void udelay (unsigned long usec)
 {
-	*((volatile unsigned int *) TCNT0) = (0 - t);
+	unsigned int start = get_usec();
+	unsigned int end = start + (usec * clk_adj);
+
+	while (get_usec() < end)
+		continue;
 }
 
-void reset_timer (void)
+unsigned long get_timer (unsigned long base)
 {
-	set_timer (0);
+	/*  return msec */
+	return ((get_usec()/clk_adj)/1000) - base;
 }
 
-void udelay (unsigned long usec)
+void set_timer (unsigned long t)
 {
-	unsigned int start = get_timer (0);
-	unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000));
+	writel((0 - t), TCNT0);
+}
 
-	while (get_timer (0) < end)
-		continue;
+void reset_timer (void)
+{
+	tmu_timer_stop(0);
+	set_timer (0);
+	tmu_timer_start(0);
 }
 
 unsigned long get_tbclk (void)

cpu/sh2/time.c → lib_sh/time_sh2.c

@@ -65,8 +65,8 @@ unsigned long long get_ticks(void)
 	return cmt0_timer;
 }
 
-static vu_long cmcnt;
-ulong get_timer(ulong base)
+static vu_long cmcnt = 0;
+static unsigned long get_usec (void)
 {
 	ulong data = readw(CMCNT_0);
 
@@ -81,7 +81,13 @@ ulong get_timer(ulong base)
 		cmt0_timer += cmcnt;
 
 	cmcnt = data;
-	return cmt0_timer - base;
+	return cmt0_timer;
+}
+
+/* return msec */
+ulong get_timer(ulong base)
+{
+	return (get_usec()/1000) - base;
 }
 
 void set_timer(ulong t)
@@ -99,9 +105,9 @@ void reset_timer(void)
 
 void udelay(unsigned long usec)
 {
-	unsigned int start = get_timer(0);
+	unsigned long end = get_usec() + usec;
 
-	while (get_timer((ulong) start) < (usec * (CONFIG_SYS_HZ / 1000000)))
+	while (get_usec() < end)
 		continue;
 }