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@@ -112,12 +112,13 @@ gafr_set: .long 0x08600000
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.globl lowlevel_init
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.globl lowlevel_init
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lowlevel_init:
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lowlevel_init:
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- /* set output and direction of pins */
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- ldr r0, PPC_BASE
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- ldr r1, pin_set_out
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- str r1, [r0, #PPSR]
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- ldr r1, pin_set_dir
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- str r1, [r0, #PPDR]
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+
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+ /* this is required for flashing */
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+ ldr r0, PPC_BASE
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+ ldr r1, pin_set_out
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+ str r1, [r0, #PPSR]
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+ ldr r1, pin_set_dir
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+ str r1, [r0, #PPDR]
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/* Setting up the memory and stuff */
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/* Setting up the memory and stuff */
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/***********************************/
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/***********************************/
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@@ -190,6 +191,11 @@ lowlevel_init:
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ldr r3, [r2]
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ldr r3, [r2]
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.endr
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.endr
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+ ldr r2, [r0, #MDCNFG]
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+ orr r2, r2, #0x00000003
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+ orr r2, r2, #0x00030000
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+ str r2, [r0, #MDCNFG]
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+
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ldr r1, msc0
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ldr r1, msc0
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str r1, [r0, #MSC0]
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str r1, [r0, #MSC0]
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ldr r1, msc1
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ldr r1, msc1
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@@ -198,13 +204,7 @@ lowlevel_init:
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str r1, [r0, #MSC2]
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str r1, [r0, #MSC2]
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ldr r1, smcnfg
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ldr r1, smcnfg
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str r1, [r0, #SMCNFG]
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str r1, [r0, #SMCNFG]
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- ldr r1, mdcnfg
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- str r1, [r0, #MDCNFG]
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ldr r1, mecr
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ldr r1, mecr
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str r1, [r0, #MECR]
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str r1, [r0, #MECR]
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- /* enable SDRAM */
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- orr r1, r1, #0x00000001
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- str r1, [r0, #MDCNFG]
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-
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mov pc, lr
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mov pc, lr
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