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@@ -48,12 +48,8 @@
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* Base addresses -- Note these are effective addresses where the
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* Base addresses -- Note these are effective addresses where the
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* actual resources get mapped (not physical addresses)
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* actual resources get mapped (not physical addresses)
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*----------------------------------------------------------------------*/
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*----------------------------------------------------------------------*/
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-#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
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-#define CFG_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc */
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-
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CFG_FLASH_BASE 0xff000000 /* start of FLASH */
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#define CFG_FLASH_BASE 0xff000000 /* start of FLASH */
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-#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
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#define CFG_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
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#define CFG_ISRAM_BASE 0x90000000 /* internal SRAM */
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#define CFG_ISRAM_BASE 0x90000000 /* internal SRAM */
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@@ -82,6 +78,10 @@
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#define CFG_ACE_BASE 0xfe000000 /* Xilinx ACE controller - Compact Flash */
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#define CFG_ACE_BASE 0xfe000000 /* Xilinx ACE controller - Compact Flash */
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+#define CFG_MONITOR_BASE TEXT_BASE
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+#define CFG_MONITOR_LEN (0xFFFFFFFF - CFG_MONITOR_LEN + 1)
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+#define CFG_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc */
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+
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* Initial RAM & stack pointer (placed in internal SRAM)
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* Initial RAM & stack pointer (placed in internal SRAM)
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*----------------------------------------------------------------------*/
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*----------------------------------------------------------------------*/
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