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@@ -95,7 +95,11 @@ struct fec_info_dma fec_info[] = {
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0, /* duplex and speed */
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0, /* phy name */
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0, /* phy name init */
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+#ifdef CFG_DMA_USE_INTSRAM
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+ DBUF_LENGTH, /* RX BD */
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+#else
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0, /* RX BD */
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+#endif
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0, /* TX BD */
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0, /* rx Index */
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0, /* tx Index */
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@@ -164,7 +168,8 @@ static void dbg_fec_regs(struct eth_device *dev)
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}
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#endif
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-static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd, int dup_spd)
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+static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd,
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+ int dup_spd)
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{
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if ((dup_spd >> 16) == FULL) {
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/* Set maximum frame length */
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@@ -513,6 +518,9 @@ int mcdmafec_initialize(bd_t * bis)
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{
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struct eth_device *dev;
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int i;
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+#ifdef CFG_DMA_USE_INTSRAM
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+ u32 tmp = CFG_INTSRAM + 0x2000;
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+#endif
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for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
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@@ -533,6 +541,17 @@ int mcdmafec_initialize(bd_t * bis)
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dev->recv = fec_recv;
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/* setup Receive and Transmit buffer descriptor */
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+#ifdef CFG_DMA_USE_INTSRAM
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+ fec_info[i].rxbd = (int)fec_info[i].rxbd + tmp;
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+ tmp = fec_info[i].rxbd;
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+ fec_info[i].txbd =
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+ (int)fec_info[i].txbd + tmp + (PKTBUFSRX * sizeof(cbd_t));
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+ tmp = fec_info[i].txbd;
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+ fec_info[i].txbuf =
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+ (int)fec_info[i].txbuf + tmp +
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+ (CFG_TX_ETH_BUFFER * sizeof(cbd_t));
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+ tmp = fec_info[i].txbuf;
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+#else
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fec_info[i].rxbd =
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(cbd_t *) memalign(CFG_CACHELINE_SIZE,
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(PKTBUFSRX * sizeof(cbd_t)));
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@@ -541,6 +560,7 @@ int mcdmafec_initialize(bd_t * bis)
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(CFG_TX_ETH_BUFFER * sizeof(cbd_t)));
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fec_info[i].txbuf =
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(char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH);
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+#endif
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#ifdef ET_DEBUG
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printf("rxbd %x txbd %x\n",
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