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@@ -1053,6 +1053,12 @@
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#define TIMING_CFG2_FOUR_ACT 0x0000003F
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#define TIMING_CFG2_FOUR_ACT 0x0000003F
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#define TIMING_CFG2_FOUR_ACT_SHIFT 0
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#define TIMING_CFG2_FOUR_ACT_SHIFT 0
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+/*
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+ * TIMING_CFG_3 - DDR SDRAM Timing Configuration 3
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+ */
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+#define TIMING_CFG3_EXT_REFREC 0x00070000
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+#define TIMING_CFG3_EXT_REFREC_SHIFT 16
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+
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/*
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/*
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* DDR_SDRAM_CFG - DDR SDRAM Control Configuration
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* DDR_SDRAM_CFG - DDR SDRAM Control Configuration
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*/
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*/
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