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@@ -138,6 +138,12 @@ long int initdram(int board_type)
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#ifndef CFG_RAMBOOT
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ulong test1, test2;
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+ /* According to AN3221 (MPC5200B SDRAM Initialization and
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+ * Configuration), the SDelay register must be written a value of
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+ * 0x00000004 as the first step of the SDRAM contorller configuration.
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+ */
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+ *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
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+
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/* configure SDRAM start/end for detection */
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
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