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@@ -106,8 +106,8 @@ typedef struct ccsr_ddr {
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char res6[4];
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uint sdram_clk_cntl; /* 0x2130 - DDR SDRAM Clock Control */
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char res7[20];
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- uint init_address; /* 0x2148 - DDR training initialization address */
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- uint init_ext_address; /* 0x214C - DDR training initialization extended address */
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+ uint init_addr; /* 0x2148 - DDR training initialization address */
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+ uint init_ext_addr; /* 0x214C - DDR training initialization extended address */
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char res8_1[16];
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uint timing_cfg_4; /* 0x2160 - DDR SDRAM Timing Configuration Register 4 */
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uint timing_cfg_5; /* 0x2164 - DDR SDRAM Timing Configuration Register 5 */
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