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@@ -600,7 +600,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
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volatile FLASH_WORD_SIZE *addr2;
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- int flag, prot, sect, l_sect;
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+ int flag, prot, sect;
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int i, rcode = 0;
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@@ -632,8 +632,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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printf ("\n");
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}
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- l_sect = -1;
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-
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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@@ -672,7 +670,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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rcode |= wait_for_DQ7(info, sect);
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}
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}
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- l_sect = sect;
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/*
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* Wait for each sector to complete, it's more
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* reliable. According to AMD Spec, you must
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@@ -691,16 +688,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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-#if 0
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- /*
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- * We wait for the last triggered sector
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- */
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- if (l_sect < 0)
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- goto DONE;
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- wait_for_DQ7(info, l_sect);
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-
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-DONE:
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-#endif
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/* reset to read mode */
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addr = (FLASH_WORD_SIZE *)info->start[0];
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addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
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