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@@ -44,56 +44,3 @@ phys_size_t initdram(int board_type)
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return dram_size;
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return dram_size;
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}
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}
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-
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-#if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1)
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-void board_add_ram_info(int use_default)
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-{
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-#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
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-#if defined(CONFIG_MPC85xx)
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- volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
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-#elif defined(CONFIG_MPC86xx)
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- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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- volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
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-#endif
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-#endif
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-
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- puts(" (");
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-
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-#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
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- /* Print interleaving information */
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- if (ddr1->cs0_config & 0x20000000) {
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- switch ((ddr1->cs0_config >> 24) & 0xf) {
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- case 0:
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- puts("cache line");
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- break;
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- case 1:
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- puts("page");
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- break;
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- case 2:
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- puts("bank");
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- break;
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- case 3:
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- puts("super-bank");
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- break;
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- default:
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- puts("invalid");
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- break;
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- }
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- } else {
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- puts("no");
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- }
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-
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- puts(" interleaving");
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-#endif
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-
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-#if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC)
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- puts(", ");
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-#endif
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-
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-#if defined(CONFIG_DDR_ECC)
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- puts("ECC enabled");
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-#endif
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-
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- puts(")");
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-}
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-#endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */
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