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@@ -463,6 +463,8 @@ void upmconfig (uint upm, uint * table, uint size)
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/* ------------------------------------------------------------------------- */
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+#ifndef CONFIG_LWMON
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+
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int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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ulong msr, addr;
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@@ -497,6 +499,32 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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return 1;
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}
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+#else /* CONFIG_LWMON */
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+
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+/*
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+ * On the LWMON board, the MCLR reset input of the PIC's on the board
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+ * uses a 47K/1n RC combination which has a 47us time constant. The
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+ * low signal on the HRESET pin of the CPU is only 512 clocks = 8 us
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+ * and thus too short to reset the external hardware. So we use the
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+ * watchdog to reset the board.
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+ */
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+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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+{
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+ /* prevent triggering the watchdog */
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+ disable_interrupts ();
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+
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+ /* make sure the watchdog is running */
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+ reset_8xx_watchdog ((immap_t *) CFG_IMMR);
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+
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+ /* wait for watchdog reset */
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+ while (1) {};
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+
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+ /* NOTREACHED */
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+ return 1;
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+}
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+
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+#endif /* CONFIG_LWMON */
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+
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/* ------------------------------------------------------------------------- */
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/*
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@@ -558,6 +586,9 @@ void watchdog_reset (void)
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if (re_enable)
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enable_interrupts ();
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}
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+#endif /* CONFIG_WATCHDOG */
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+
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+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_LWMON)
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void reset_8xx_watchdog (volatile immap_t * immr)
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{
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