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@@ -27,9 +27,10 @@
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#define SYSREG_MMUCR_S_OFFSET 4
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#define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0))
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-#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE) \
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- | SYSREG_BIT(FE) | SYSREG_BIT(RE) \
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- | SYSREG_BIT(IBE) | SYSREG_BIT(IEE))
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+/* due to errata (unreliable branch folding) clear FE bit explicitly */
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+#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE) \
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+ | SYSREG_BIT(RE) | SYSREG_BIT(IBE) \
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+ | SYSREG_BIT(IEE)) & ~SYSREG_BIT(FE))
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/*
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* To save some space, we use the same entry point for
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