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@@ -32,6 +32,8 @@
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#elif defined(CONFIG_S3C2410)
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#include <s3c2410.h>
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#endif
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+
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+#include <asm/io.h>
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#include <i2c.h>
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#ifdef CONFIG_HARD_I2C
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@@ -42,142 +44,139 @@
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#define I2C_OK 0
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#define I2C_NOK 1
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#define I2C_NACK 2
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-#define I2C_NOK_LA 3 /* Lost arbitration */
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-#define I2C_NOK_TOUT 4 /* time out */
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-
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-#define I2CSTAT_BSY 0x20 /* Busy bit */
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-#define I2CSTAT_NACK 0x01 /* Nack bit */
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-#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
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-#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
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-#define I2C_MODE_MR 0x80 /* Master Receive Mode */
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-#define I2C_START_STOP 0x20 /* START / STOP */
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-#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
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+#define I2C_NOK_LA 3 /* Lost arbitration */
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+#define I2C_NOK_TOUT 4 /* time out */
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-#define I2C_TIMEOUT 1 /* 1 second */
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+#define I2CSTAT_BSY 0x20 /* Busy bit */
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+#define I2CSTAT_NACK 0x01 /* Nack bit */
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+#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
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+#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
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+#define I2C_MODE_MR 0x80 /* Master Receive Mode */
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+#define I2C_START_STOP 0x20 /* START / STOP */
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+#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
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+#define I2C_TIMEOUT 1 /* 1 second */
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static int GetI2CSDA(void)
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{
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- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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+ struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
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#ifdef CONFIG_S3C2410
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- return (gpio->GPEDAT & 0x8000) >> 15;
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+ return (readl(&gpio->GPEDAT) & 0x8000) >> 15;
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#endif
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#ifdef CONFIG_S3C2400
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- return (gpio->PGDAT & 0x0020) >> 5;
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+ return (readl(&gpio->PGDAT) & 0x0020) >> 5;
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#endif
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}
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#if 0
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static void SetI2CSDA(int x)
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{
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- rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15;
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+ rGPEDAT = (rGPEDAT & ~0x8000) | (x & 1) << 15;
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}
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#endif
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static void SetI2CSCL(int x)
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{
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- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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+ struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
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#ifdef CONFIG_S3C2410
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- gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14;
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+ writel((readl(&gpio->GPEDAT) & ~0x4000) | (x & 1) << 14, &gpio->GPEDAT);
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#endif
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#ifdef CONFIG_S3C2400
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- gpio->PGDAT = (gpio->PGDAT & ~0x0040) | (x&1) << 6;
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+ writel((readl(&gpio->PGDAT) & ~0x0040) | (x & 1) << 6, &gpio->PGDAT);
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#endif
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}
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-
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-static int WaitForXfer (void)
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+static int WaitForXfer(void)
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{
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- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
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- int i, status;
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+ struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
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+ int i;
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i = I2C_TIMEOUT * 10000;
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- status = i2c->IICCON;
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- while ((i > 0) && !(status & I2CCON_IRPND)) {
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- udelay (100);
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- status = i2c->IICCON;
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+ while (!(readl(&i2c->IICCON) & I2CCON_IRPND) && (i > 0)) {
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+ udelay(100);
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i--;
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}
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- return (status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
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+ return (readl(&i2c->IICCON) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
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}
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-static int IsACK (void)
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+static int IsACK(void)
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{
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- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
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+ struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
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- return (!(i2c->IICSTAT & I2CSTAT_NACK));
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+ return !(readl(&i2c->IICSTAT) & I2CSTAT_NACK);
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}
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-static void ReadWriteByte (void)
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+static void ReadWriteByte(void)
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{
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- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
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+ struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
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- i2c->IICCON &= ~I2CCON_IRPND;
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+ writel(readl(&i2c->IICCON) & ~I2CCON_IRPND, &i2c->IICCON);
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}
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-void i2c_init (int speed, int slaveadd)
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+void i2c_init(int speed, int slaveadd)
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{
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- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
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- S3C24X0_GPIO *const gpio = S3C24X0_GetBase_GPIO ();
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+ struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
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+ struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
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ulong freq, pres = 16, div;
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- int i, status;
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+ int i;
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/* wait for some time to give previous transfer a chance to finish */
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i = I2C_TIMEOUT * 1000;
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- status = i2c->IICSTAT;
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- while ((i > 0) && (status & I2CSTAT_BSY)) {
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- udelay (1000);
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- status = i2c->IICSTAT;
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+ while ((readl(&i2c->IICSTAT) && I2CSTAT_BSY) && (i > 0)) {
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+ udelay(1000);
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i--;
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}
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- if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
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+ if ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) || GetI2CSDA() == 0) {
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#ifdef CONFIG_S3C2410
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- ulong old_gpecon = gpio->GPECON;
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+ ulong old_gpecon = readl(&gpio->GPECON);
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#endif
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#ifdef CONFIG_S3C2400
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- ulong old_gpecon = gpio->PGCON;
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+ ulong old_gpecon = readl(&gpio->PGCON);
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#endif
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- /* bus still busy probably by (most) previously interrupted transfer */
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+ /* bus still busy probably by (most) previously interrupted
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+ transfer */
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#ifdef CONFIG_S3C2410
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/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
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- gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
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+ writel((readl(&gpio->GPECON) & ~0xF0000000) | 0x10000000,
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+ &gpio->GPECON);
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#endif
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#ifdef CONFIG_S3C2400
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/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
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- gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000;
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+ writel((readl(&gpio->PGCON) & ~0x00003c00) | 0x00001000,
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+ &gpio->PGCON);
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#endif
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/* toggle I2CSCL until bus idle */
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- SetI2CSCL (0);
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- udelay (1000);
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+ SetI2CSCL(0);
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+ udelay(1000);
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i = 10;
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- while ((i > 0) && (GetI2CSDA () != 1)) {
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- SetI2CSCL (1);
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- udelay (1000);
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- SetI2CSCL (0);
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- udelay (1000);
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+ while ((i > 0) && (GetI2CSDA() != 1)) {
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+ SetI2CSCL(1);
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+ udelay(1000);
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+ SetI2CSCL(0);
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+ udelay(1000);
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i--;
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}
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- SetI2CSCL (1);
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- udelay (1000);
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+ SetI2CSCL(1);
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+ udelay(1000);
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/* restore pin functions */
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#ifdef CONFIG_S3C2410
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- gpio->GPECON = old_gpecon;
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+ writel(old_gpecon, &gpio->GPECON);
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#endif
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#ifdef CONFIG_S3C2400
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- gpio->PGCON = old_gpecon;
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+ writel(old_gpecon, &gpio->PGCON);
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#endif
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}
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/* calculate prescaler and divisor values */
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- freq = get_PCLK ();
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+ freq = get_PCLK();
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if ((freq / pres / (16 + 1)) > speed)
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/* set prescaler to 512 */
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pres = 512;
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@@ -188,13 +187,13 @@ void i2c_init (int speed, int slaveadd)
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/* set prescaler, divisor according to freq, also set
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* ACKGEN, IRQ */
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- i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
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+ writel((div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0), &i2c->IICCON);
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/* init to SLAVE REVEIVE and set slaveaddr */
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- i2c->IICSTAT = 0;
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- i2c->IICADD = slaveadd;
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+ writel(0, &i2c->IICSTAT);
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+ writel(slaveadd, &i2c->IICADD);
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/* program Master Transmit (and implicit STOP) */
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- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
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+ writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);
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}
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@@ -206,107 +205,109 @@ void i2c_init (int speed, int slaveadd)
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* 0 we skip the address write cycle.
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*/
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static
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-int i2c_transfer (unsigned char cmd_type,
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- unsigned char chip,
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- unsigned char addr[],
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- unsigned char addr_len,
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- unsigned char data[], unsigned short data_len)
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+int i2c_transfer(unsigned char cmd_type,
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+ unsigned char chip,
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+ unsigned char addr[],
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+ unsigned char addr_len,
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+ unsigned char data[], unsigned short data_len)
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{
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- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
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- int i, status, result;
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+ struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
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+ int i, result;
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if (data == 0 || data_len == 0) {
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/*Don't support data transfer of no length or to address 0 */
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- printf ("i2c_transfer: bad call\n");
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+ printf("i2c_transfer: bad call\n");
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return I2C_NOK;
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}
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/* Check I2C bus idle */
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i = I2C_TIMEOUT * 1000;
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- status = i2c->IICSTAT;
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- while ((i > 0) && (status & I2CSTAT_BSY)) {
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- udelay (1000);
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- status = i2c->IICSTAT;
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+ while ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) && (i > 0)) {
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+ udelay(1000);
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i--;
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}
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- if (status & I2CSTAT_BSY)
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+ if (readl(&i2c->IICSTAT) & I2CSTAT_BSY)
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return I2C_NOK_TOUT;
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- i2c->IICCON |= 0x80;
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+ writel(readl(&i2c->IICCON) | 0x80, &i2c->IICCON);
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result = I2C_OK;
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switch (cmd_type) {
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case I2C_WRITE:
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if (addr && addr_len) {
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- i2c->IICDS = chip;
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+ writel(chip, &i2c->IICDS);
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/* send START */
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- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
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+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
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+ &i2c->IICSTAT);
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i = 0;
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while ((i < addr_len) && (result == I2C_OK)) {
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- result = WaitForXfer ();
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- i2c->IICDS = addr[i];
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- ReadWriteByte ();
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+ result = WaitForXfer();
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+ writel(addr[i], &i2c->IICDS);
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+ ReadWriteByte();
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i++;
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}
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i = 0;
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while ((i < data_len) && (result == I2C_OK)) {
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- result = WaitForXfer ();
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- i2c->IICDS = data[i];
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- ReadWriteByte ();
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+ result = WaitForXfer();
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+ writel(data[i], &i2c->IICDS);
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+ ReadWriteByte();
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i++;
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}
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} else {
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- i2c->IICDS = chip;
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+ writel(chip, &i2c->IICDS);
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/* send START */
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- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
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+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
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+ &i2c->IICSTAT);
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i = 0;
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while ((i < data_len) && (result = I2C_OK)) {
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- result = WaitForXfer ();
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- i2c->IICDS = data[i];
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- ReadWriteByte ();
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+ result = WaitForXfer();
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+ writel(data[i], &i2c->IICDS);
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+ ReadWriteByte();
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i++;
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}
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}
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if (result == I2C_OK)
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- result = WaitForXfer ();
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+ result = WaitForXfer();
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/* send STOP */
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- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
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- ReadWriteByte ();
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+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
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+ ReadWriteByte();
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break;
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case I2C_READ:
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if (addr && addr_len) {
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- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
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- i2c->IICDS = chip;
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+ writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);
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+ writel(chip, &i2c->IICDS);
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/* send START */
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- i2c->IICSTAT |= I2C_START_STOP;
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- result = WaitForXfer ();
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- if (IsACK ()) {
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+ writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
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+ &i2c->IICSTAT);
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+ result = WaitForXfer();
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+ if (IsACK()) {
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i = 0;
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while ((i < addr_len) && (result == I2C_OK)) {
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- i2c->IICDS = addr[i];
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- ReadWriteByte ();
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- result = WaitForXfer ();
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+ writel(addr[i], &i2c->IICDS);
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+ ReadWriteByte();
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+ result = WaitForXfer();
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i++;
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}
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- i2c->IICDS = chip;
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+ writel(chip, &i2c->IICDS);
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/* resend START */
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- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA |
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- I2C_START_STOP;
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- ReadWriteByte ();
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- result = WaitForXfer ();
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+ writel(I2C_MODE_MR | I2C_TXRX_ENA |
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+ I2C_START_STOP, &i2c->IICSTAT);
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+ ReadWriteByte();
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+ result = WaitForXfer();
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i = 0;
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while ((i < data_len) && (result == I2C_OK)) {
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/* disable ACK for final READ */
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if (i == data_len - 1)
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- i2c->IICCON &= ~0x80;
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- ReadWriteByte ();
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|
|
- result = WaitForXfer ();
|
|
|
- data[i] = i2c->IICDS;
|
|
|
+ writel(readl(&i2c->IICCON)
|
|
|
+ & ~0x80, &i2c->IICCON);
|
|
|
+ ReadWriteByte();
|
|
|
+ result = WaitForXfer();
|
|
|
+ data[i] = readl(&i2c->IICDS);
|
|
|
i++;
|
|
|
}
|
|
|
} else {
|
|
@@ -314,21 +315,23 @@ int i2c_transfer (unsigned char cmd_type,
|
|
|
}
|
|
|
|
|
|
} else {
|
|
|
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
|
|
|
- i2c->IICDS = chip;
|
|
|
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
|
|
|
+ writel(chip, &i2c->IICDS);
|
|
|
/* send START */
|
|
|
- i2c->IICSTAT |= I2C_START_STOP;
|
|
|
- result = WaitForXfer ();
|
|
|
+ writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
|
|
|
+ &i2c->IICSTAT);
|
|
|
+ result = WaitForXfer();
|
|
|
|
|
|
- if (IsACK ()) {
|
|
|
+ if (IsACK()) {
|
|
|
i = 0;
|
|
|
while ((i < data_len) && (result == I2C_OK)) {
|
|
|
/* disable ACK for final READ */
|
|
|
if (i == data_len - 1)
|
|
|
- i2c->IICCON &= ~0x80;
|
|
|
- ReadWriteByte ();
|
|
|
- result = WaitForXfer ();
|
|
|
- data[i] = i2c->IICDS;
|
|
|
+ writel(readl(&i2c->IICCON) &
|
|
|
+ ~0x80, &i2c->IICCON);
|
|
|
+ ReadWriteByte();
|
|
|
+ result = WaitForXfer();
|
|
|
+ data[i] = readl(&i2c->IICDS);
|
|
|
i++;
|
|
|
}
|
|
|
} else {
|
|
@@ -337,12 +340,12 @@ int i2c_transfer (unsigned char cmd_type,
|
|
|
}
|
|
|
|
|
|
/* send STOP */
|
|
|
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
|
|
|
- ReadWriteByte ();
|
|
|
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
|
|
|
+ ReadWriteByte();
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
- printf ("i2c_transfer: bad call\n");
|
|
|
+ printf("i2c_transfer: bad call\n");
|
|
|
result = I2C_NOK;
|
|
|
break;
|
|
|
}
|
|
@@ -350,7 +353,7 @@ int i2c_transfer (unsigned char cmd_type,
|
|
|
return (result);
|
|
|
}
|
|
|
|
|
|
-int i2c_probe (uchar chip)
|
|
|
+int i2c_probe(uchar chip)
|
|
|
{
|
|
|
uchar buf[1];
|
|
|
|
|
@@ -361,16 +364,16 @@ int i2c_probe (uchar chip)
|
|
|
* address was <ACK>ed (i.e. there was a chip at that address which
|
|
|
* drove the data line low).
|
|
|
*/
|
|
|
- return (i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK);
|
|
|
+ return i2c_transfer(I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
|
|
|
}
|
|
|
|
|
|
-int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
|
|
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|
|
{
|
|
|
uchar xaddr[4];
|
|
|
int ret;
|
|
|
|
|
|
if (alen > 4) {
|
|
|
- printf ("I2C read: addr len %d not supported\n", alen);
|
|
|
+ printf("I2C read: addr len %d not supported\n", alen);
|
|
|
return 1;
|
|
|
}
|
|
|
|
|
@@ -394,23 +397,24 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
|
|
* hidden in the chip address.
|
|
|
*/
|
|
|
if (alen > 0)
|
|
|
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
|
|
+ chip |= ((addr >> (alen * 8)) &
|
|
|
+ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
|
|
#endif
|
|
|
if ((ret =
|
|
|
- i2c_transfer (I2C_READ, chip << 1, &xaddr[4 - alen], alen,
|
|
|
- buffer, len)) != 0) {
|
|
|
- printf ("I2c read: failed %d\n", ret);
|
|
|
+ i2c_transfer(I2C_READ, chip << 1, &xaddr[4 - alen], alen,
|
|
|
+ buffer, len)) != 0) {
|
|
|
+ printf("I2c read: failed %d\n", ret);
|
|
|
return 1;
|
|
|
}
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
|
|
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|
|
{
|
|
|
uchar xaddr[4];
|
|
|
|
|
|
if (alen > 4) {
|
|
|
- printf ("I2C write: addr len %d not supported\n", alen);
|
|
|
+ printf("I2C write: addr len %d not supported\n", alen);
|
|
|
return 1;
|
|
|
}
|
|
|
|
|
@@ -433,10 +437,11 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
|
|
* hidden in the chip address.
|
|
|
*/
|
|
|
if (alen > 0)
|
|
|
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
|
|
+ chip |= ((addr >> (alen * 8)) &
|
|
|
+ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
|
|
#endif
|
|
|
return (i2c_transfer
|
|
|
(I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
|
|
|
len) != 0);
|
|
|
}
|
|
|
-#endif /* CONFIG_HARD_I2C */
|
|
|
+#endif /* CONFIG_HARD_I2C */
|