Merge branch 'master' of git://git.denx.de/u-boot-ti

arch/arm/cpu/armv7/omap4/Makefile

@@ -28,6 +28,7 @@ LIB	=  $(obj)lib$(SOC).a
 SOBJS	+= lowlevel_init.o
 
 COBJS	+= board.o
+COBJS	+= mem.o
 COBJS	+= sys_info.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)

arch/arm/cpu/armv7/omap4/mem.c

@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Steve Sakoman <steve@sakoman.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/sys_proto.h>
+
+struct gpmc *gpmc_cfg;
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+	gpmc_cfg = (struct gpmc *)GPMC_BASE;
+
+	/* global settings */
+	writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */
+	writel(0, &gpmc_cfg->timeout_control);/* timeout disable */
+
+	/*
+	 * Disable the GPMC0 config set by ROM code
+	 * It conflicts with our MPDB (both at 0x08000000)
+	 */
+	writel(0, &gpmc_cfg->cs[0].config7);
+}

arch/arm/include/asm/arch-omap4/cpu.h

@@ -31,6 +31,51 @@
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
+struct gpmc_cs {
+	u32 config1;		/* 0x00 */
+	u32 config2;		/* 0x04 */
+	u32 config3;		/* 0x08 */
+	u32 config4;		/* 0x0C */
+	u32 config5;		/* 0x10 */
+	u32 config6;		/* 0x14 */
+	u32 config7;		/* 0x18 */
+	u32 nand_cmd;		/* 0x1C */
+	u32 nand_adr;		/* 0x20 */
+	u32 nand_dat;		/* 0x24 */
+	u8 res[8];		/* blow up to 0x30 byte */
+};
+
+struct gpmc {
+	u8 res1[0x10];
+	u32 sysconfig;		/* 0x10 */
+	u8 res2[0x4];
+	u32 irqstatus;		/* 0x18 */
+	u32 irqenable;		/* 0x1C */
+	u8 res3[0x20];
+	u32 timeout_control;	/* 0x40 */
+	u8 res4[0xC];
+	u32 config;		/* 0x50 */
+	u32 status;		/* 0x54 */
+	u8 res5[0x8];	/* 0x58 */
+	struct gpmc_cs cs[8];	/* 0x60, 0x90, .. */
+	u8 res6[0x14];		/* 0x1E0 */
+	u32 ecc_config;		/* 0x1F4 */
+	u32 ecc_control;	/* 0x1F8 */
+	u32 ecc_size_config;	/* 0x1FC */
+	u32 ecc1_result;	/* 0x200 */
+	u32 ecc2_result;	/* 0x204 */
+	u32 ecc3_result;	/* 0x208 */
+	u32 ecc4_result;	/* 0x20C */
+	u32 ecc5_result;	/* 0x210 */
+	u32 ecc6_result;	/* 0x214 */
+	u32 ecc7_result;	/* 0x218 */
+	u32 ecc8_result;	/* 0x21C */
+	u32 ecc9_result;	/* 0x220 */
+};
+
+/* Used for board specific gpmc initialization */
+extern struct gpmc *gpmc_cfg;
+
 struct gptimer {
 	u32 tidr;		/* 0x00 r */
 	u8 res[0xc];
@@ -86,6 +131,9 @@ struct watchdog {
 #define TCLR_AR			(0x1 << 1)
 #define TCLR_PRE		(0x1 << 5)
 
+/* GPMC BASE */
+#define GPMC_BASE		(OMAP44XX_GPMC_BASE)
+
 /* I2C base */
 #define I2C_BASE1		(OMAP44XX_L4_PER_BASE + 0x70000)
 #define I2C_BASE2		(OMAP44XX_L4_PER_BASE + 0x72000)

arch/arm/include/asm/arch-omap4/omap4.h

@@ -62,7 +62,7 @@
 #define SYNC_32KTIMER_BASE	(OMAP44XX_L4_WKUP_BASE + 0x4000)
 
 /* GPMC */
-#define GPMC_BASE	0x50000000
+#define OMAP44XX_GPMC_BASE	0x50000000
 
 /*
  * Hardware Register Details

arch/arm/include/asm/arch-omap4/sys_proto.h

@@ -28,6 +28,7 @@ struct omap_sysinfo {
 	char *board_string;
 };
 
+void gpmc_init(void);
 void watchdog_init(void);
 u32 get_device_type(void);
 void invalidate_dcache(u32);

board/davinci/da8xxevm/da830evm.c

@@ -45,63 +45,63 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define pinmux	&davinci_syscfg_regs->pinmux
+#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])
 
 /* SPI0 pin muxer settings */
 static const struct pinmux_config spi0_pins[] = {
-	{ pinmux[7], 1, 3 },
-	{ pinmux[7], 1, 4 },
-	{ pinmux[7], 1, 5 },
-	{ pinmux[7], 1, 6 },
-	{ pinmux[7], 1, 7 }
+	{ pinmux(7), 1, 3 },
+	{ pinmux(7), 1, 4 },
+	{ pinmux(7), 1, 5 },
+	{ pinmux(7), 1, 6 },
+	{ pinmux(7), 1, 7 }
 };
 
 /* EMIF-A bus pins for 8-bit NAND support on CS3 */
 static const struct pinmux_config emifa_nand_pins[] = {
-	{ pinmux[13], 1, 6 },
-	{ pinmux[13], 1, 7 },
-	{ pinmux[14], 1, 0 },
-	{ pinmux[14], 1, 1 },
-	{ pinmux[14], 1, 2 },
-	{ pinmux[14], 1, 3 },
-	{ pinmux[14], 1, 4 },
-	{ pinmux[14], 1, 5 },
-	{ pinmux[15], 1, 7 },
-	{ pinmux[16], 1, 0 },
-	{ pinmux[18], 1, 1 },
-	{ pinmux[18], 1, 4 },
-	{ pinmux[18], 1, 5 },
+	{ pinmux(13), 1, 6 },
+	{ pinmux(13), 1, 7 },
+	{ pinmux(14), 1, 0 },
+	{ pinmux(14), 1, 1 },
+	{ pinmux(14), 1, 2 },
+	{ pinmux(14), 1, 3 },
+	{ pinmux(14), 1, 4 },
+	{ pinmux(14), 1, 5 },
+	{ pinmux(15), 1, 7 },
+	{ pinmux(16), 1, 0 },
+	{ pinmux(18), 1, 1 },
+	{ pinmux(18), 1, 4 },
+	{ pinmux(18), 1, 5 },
 };
 
 /* EMAC PHY interface pins */
 static const struct pinmux_config emac_pins[] = {
-	{ pinmux[9], 0, 5 },
-	{ pinmux[10], 2, 1 },
-	{ pinmux[10], 2, 2 },
-	{ pinmux[10], 2, 3 },
-	{ pinmux[10], 2, 4 },
-	{ pinmux[10], 2, 5 },
-	{ pinmux[10], 2, 6 },
-	{ pinmux[10], 2, 7 },
-	{ pinmux[11], 2, 0 },
-	{ pinmux[11], 2, 1 },
+	{ pinmux(9), 0, 5 },
+	{ pinmux(10), 2, 1 },
+	{ pinmux(10), 2, 2 },
+	{ pinmux(10), 2, 3 },
+	{ pinmux(10), 2, 4 },
+	{ pinmux(10), 2, 5 },
+	{ pinmux(10), 2, 6 },
+	{ pinmux(10), 2, 7 },
+	{ pinmux(11), 2, 0 },
+	{ pinmux(11), 2, 1 },
 };
 
 /* UART pin muxer settings */
 static const struct pinmux_config uart_pins[] = {
-	{ pinmux[8], 2, 7 },
-	{ pinmux[9], 2, 0 }
+	{ pinmux(8), 2, 7 },
+	{ pinmux(9), 2, 0 }
 };
 
 /* I2C pin muxer settings */
 static const struct pinmux_config i2c_pins[] = {
-	{ pinmux[8], 2, 3 },
-	{ pinmux[8], 2, 4 }
+	{ pinmux(8), 2, 3 },
+	{ pinmux(8), 2, 4 }
 };
 
 /* USB0_DRVVBUS pin muxer settings */
 static const struct pinmux_config usb_pins[] = {
-	{ pinmux[9], 1, 1 }
+	{ pinmux(9), 1, 1 }
 };
 
 static const struct pinmux_resource pinmuxes[] = {

board/davinci/da8xxevm/da850evm.c

@@ -30,28 +30,28 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define pinmux	(&davinci_syscfg_regs->pinmux)
+#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])
 
 /* SPI0 pin muxer settings */
 static const struct pinmux_config spi1_pins[] = {
-	{ pinmux[5], 1, 1 },
-	{ pinmux[5], 1, 2 },
-	{ pinmux[5], 1, 4 },
-	{ pinmux[5], 1, 5 }
+	{ pinmux(5), 1, 1 },
+	{ pinmux(5), 1, 2 },
+	{ pinmux(5), 1, 4 },
+	{ pinmux(5), 1, 5 }
 };
 
 /* UART pin muxer settings */
 static const struct pinmux_config uart_pins[] = {
-	{ pinmux[0], 4, 6 },
-	{ pinmux[0], 4, 7 },
-	{ pinmux[4], 2, 4 },
-	{ pinmux[4], 2, 5 }
+	{ pinmux(0), 4, 6 },
+	{ pinmux(0), 4, 7 },
+	{ pinmux(4), 2, 4 },
+	{ pinmux(4), 2, 5 }
 };
 
 /* I2C pin muxer settings */
 static const struct pinmux_config i2c_pins[] = {
-	{ pinmux[4], 2, 2 },
-	{ pinmux[4], 2, 3 }
+	{ pinmux(4), 2, 2 },
+	{ pinmux(4), 2, 3 }
 };
 
 static const struct pinmux_resource pinmuxes[] = {

board/ti/panda/panda.c

@@ -37,6 +37,8 @@ const struct omap_sysinfo sysinfo = {
  */
 int board_init(void)
 {
+	gpmc_init();
+
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
 	gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
 

board/ti/sdp4430/sdp.c

@@ -38,6 +38,8 @@ const struct omap_sysinfo sysinfo = {
  */
 int board_init(void)
 {
+	gpmc_init();
+
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_4430SDP;
 	gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
 

drivers/usb/musb/omap3.h

@@ -45,7 +45,7 @@
 int musb_platform_init(void);
 
 #ifdef CONFIG_OMAP3_EVM
-extern u8 omap3_evm_use_extvbus(void);
+extern u8 omap3_evm_need_extvbus(void);
 #endif
 
 #endif /* _MUSB_OMAP3_H */